Advanced Circuits for Emerging Technologies E-Book

Krzysztof Iniewski

• Herausgeber: John Wiley & Sons
• Kategorie: Wissenschaft und neue Technologien
• Sprache: Englisch

Seitenzahl: 1019

Veröffentlichungsjahr: 2012

Beschreibung

The book will address the-state-of-the-art in integrated circuit design in the context of emerging systems. New exciting opportunities in body area networks, wireless communications, data networking, and optical imaging are discussed. Emerging materials that can take system performance beyond standard CMOS, like Silicon on Insulator (SOI), Silicon Germanium (SiGe), and Indium Phosphide (InP) are explored. Three-dimensional (3-D) CMOS integration and co-integration with sensor technology are described as well. The book is a must for anyone serious about circuit design for future technologies. The book is written by top notch international experts in industry and academia. The intended audience is practicing engineers with integrated circuit background. The book will be also used as a recommended reading and supplementary material in graduate course curriculum. Intended audience is professionals working in the integrated circuit design field. Their job titles might be : design engineer, product manager, marketing manager, design team leader, etc. The book will be also used by graduate students. Many of the chapter authors are University Professors.

Leseprobe

Contents

Cover

Title Page

Copyright

Preface

Contributors

Part I: Digital Design and Power Management

Chapter 1: Design in the Energy–Delay Space

1.1 Introduction

1.2 Energy and Delay Modeling

1.3 Energy–Delay Space Analysis and Hardware-Intensity

1.4 Energy-Efficient Design of Digital Circuits

1.5 Design of Energy-Efficient Pipelined Systems

1.6 Conclusion

References

Chapter 2: Subthreshold Source-Coupled Logic

2.1 Introduction

2.2 UltraLow Power CMOS Logic: Design and Tradeoffs

2.3 Subthreshold Source-Coupled Logic

2.4 Power-Frequency Scaling

2.5 Conclusions

Acknowledgment

References

Chapter 3: Ultralow-Voltage Design of Nanometer CMOS Circuits for Smart Energy-Autonomous Systems

3.1 Introduction

3.2 Impact of Technology Scaling on Subthreshold MOSFET Characteristics

3.3 Scaling Trend of the Minimum-Energy Point

3.4 Practical Energy of Nanometer ULV Circuits under Robustness and Timing Constraints

3.5 Technology/Circuit Methodology and Roadmap for ULV Design in the Nanometer Era

3.6 Conclusion

Acknowledgment

References

Chapter 4: Impairment-Aware Analog Circuit Design by Reconfiguring Feedback Systems

4.1 Introduction

4.2 Theorem of Impairment-Aware Analog Design in Feedback Systems

4.3 Practical Implementations

4.4 Measured Results

4.5 Conclusions

References

Chapter 5: Rom-Based Logic Design: A Low-Power Design Perspective

5.1 Introduction

RBL Design

5.3 RBL Adder

5.4 RBL Multiplier

5.5 Conclusions

Acknowledgment

References

Chapter 6: Power Management: Enabling Technology

6.1 Macroeconomic Drivers for Power Technologies

6.2 Market Trends

6.3 Application Examples

6.4 Technology Implications and Trends

6.5 Current Technologies and Capabilities

6.6 Specific Application Example

6.7 Emerging Technologies

6.8 Conclusion

References

Chapter 7: Ultralow Power Management Circuit for Optimal Energy Harvesting in Wireless Body Area Network

7.1 Introduction

7.2 Wireless Body Area Network

7.3 Optimal Energy Harvesting System

7.4 Ultralow Power Management Integrated Circuit for Solar Energy Harvesting System

7.5 Conclusions

References

Part II: Analog and RF Design

Chapter 8: Analog Circuit Design for SOI

8.1 SOI Devices

8.2 Partially Depleted SOI

8.3 FDSOI and fINFET

8.4 Device Considerations (FDSOI AND PDSOI)

8.5 Analog Circuit Building Blocks

8.6 Operational Amplifiers

8.7 Operational Transconductance Amplifier

8.8 Radio Frequency Low-Noise Amplifier

8.9 Mixers and Analog Multipliers

8.10 Analog to Digital and Digital to Analog Converters

8.11 Summary

References

Chapter 9: Frequency Generation and Control With Self-Referenced CMOS Oscillators

9.1 Introduction

9.2 Self-Referenced CMOS Oscillators

9.3 Packaging

9.4 Conclusion

Acknowledgments

References

Chapter 10: Synthesis of Static and Dynamic Translinear Circuits

10.1 Translinear Circuits: What Is In a Name?

10.2 The Scope of Translinear Circuits

10.3 Static and Dynamic Translinear Circuit Synthesis

10.4 Static Translinear Circuit Synthesis Examples

10.5 Dynamic Translinear Circuit Synthesis Examples

References

Chapter 11: Microwatt Power Cmos Analog Circuit Designs: Ultralow Power Lsis for Power-Aware Applications

11.1 Introduction

11.2 Subthreshold Characteristics in a MOSFET

11.3 Low-Power Voltage Reference Circuits

11.4 Low-Power Current Reference Circuits

11.5 Example of Power-Aware LSI Applications: CMOS Smart Sensor for Monitoring the Quality of Perishables

11.6 Conclusion and Discussion

References

Chapter 12: High-Speed Current-Mode Data Drivers for Amoled Displays

12.1 Introduction

12.2 Current-Mode Drivers in Representation of the Second-Generation Current Conveyor

12.3 Improved Transient Current Feed-Forward Output Buffer

12.4 Push-Pull Transient Current Feedforward Output Buffer

12.5 Conclusion

References

Chapter 13: RF Transceivers for Wireless Applications

13.1 Transmitter Architectures

13.2 Cartesian Transmitters

13.3 Constant-Envelope Transmitters Using Phase Modulated Loops

13.4 Polar Transmitters

13.5 Case Studies

References

Part III: Device Layout and Reliability

Chapter 14: Technology-Aware Communication Architecture Design for Parallel Hardware Platforms

14.1 Introduction

14.2 NOC Building Blocks: The Switch

14.3 NOC Connectivity Pattern

14.4 NOCS and the GALS Paradigm

14.5 Putting Everything Together: Technology-Aware Network Connectivity

14.6 Looking Forward: Mesochronous Synchronization

14.7 Conclusions

References

Chapter 15: Design and Optimization of Integrated Transmission Lines on Scaled CMOS Technologies

15.1 Introduction

15.2 Coplanar Waveguides

15.3 Shielded Transmission Lines

15.4 Accurate and Fast Analysis of Periodic Lines

15.5 Design and Experimental Results

15.6 Conclusions

References

Chapter 16: On-Chip Surfing Interconnect

16.1 Introduction

16.2 Surfing

16.3 Surfing DLLs

16.4 Pipelined Clock Forwarding

16.5 Source Synchronous Surfing

16.6 Surfing Handshakes

16.7 Summary

References

Chapter 17: On-Chip Spiral Inductors With Integrated Magnetic Materials

17.1 Introduction

17.2 Previous Work

17.3 Magnetic Materials

17.4 Simulation Study

17.5 Device Fabrication

17.6 Measurement Results

17.7 Potential Applications of On-Chip Spiral Inductors with Magnetic Materials

17.8 Conclusion

References

Chapter 18: Reliability of Nanoelectronic VLSI

18.1 Introduction

18.2 Increased Defect Density and Reliability

18.3 Reliability Evaluation

18.4 Historically Important CAD Tools

18.5 Recent Progress

18.6 Monte Carlo Reliability Evaluation Tool

18.7 Fault-Tolerant Computing

18.8 Conclusions

Acknowledgments

References

Chapter 19: Temperature Monitoring Issues in Nanometer CMOS Integrated Circuits

19.1 Introduction

19.2 From Where Does Heat Come in Nanometer Circuits?

19.3 Harmful Effects Due to Temperature in VLSI Chips

19.4 Temperature Sensing for DTM

19.5 Thermal Modeling

19.6 Thermal Sensor Placement and Allocation

19.7 Temperature Monitoring Networks

19.8 Conclusions

Acknowledgments

References

Part IV: Circuit Testing

Chapter 20: Low-Power Testing for Low-Power LSI Circuits

20.1 Introduction

20.2 Test Power Problem in Logic LSI Testing

20.3 Basic Strategies to Test Power Reduction

20.4 Shift Power Reduction

20.5 Capture Power Reduction

20.6 Toward Next-Generation Low-Power Testing Solutions

20.7 Summary

References

Chapter 21: Checkers for Online Self-Testing of Analog Circuits

21.1 Introduction

21.2 Time-Invariant Linear Circuits

21.3 Fully Differential Circuits

21.4 Conclusions

References

Chapter 22: Design and Test of Robust CMOS RF and MM-Wave Radios

22.1 Introduction

22.2 Why Robust RF and mm-Wave ICs?

22.3 Design Methodology for First-Time-Right Radio SOCs

22.4 Robust RF and mm-Wave Radio Transceivers

22.5 Summary

References

Chapter 23: Contactless Testing and Diagnosis Techniques

23.1 Introduction

23.2 Electron-Beam Method

23.3 Photoemissive Probing

23.4 Electro-Optic Probing

23.5 Charge Density Probing

23.6 Photoexcitation Probe Techniques

23.7 Electric Force Microscopy

23.8 Capacitive Coupling Method

23.9 Dynamic Internal Testing of CMOS using Hot-Carrier Luminescence

23.10 All-Silicon Optical Contactless Testing of Integrated Circuits

23.11 Conclusion

References

Index

Copyright © 2012 by John Wiley & Sons, Inc. All rights reserved.

Published by John Wiley & Sons, Inc., Hoboken, New Jersey.

Published simultaneously in Canada.

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Library of Congress Cataloging-in-Publication Data is available.

ISBN: 978-0-470-90005-5

Preface

The book addresses the state of the art in integrated circuit design in the context of emerging systems. New exciting opportunities in body area networks, wireless communications, data networking, and optical imaging are discussed. Emerging design techniques for digital, power management, analog, and RF circuits are explored. Device layout, reliability, and testing techniques are described as well. The book is a must for anyone serious about circuit design for future technologies.

The book is written by top-notch international experts in industry and academia. The intended audience is practicing engineers with integrated circuit background. The book can also be used as a recommended reading and supplementary material in graduate course curriculum. Intended audience consists of professionals working in the integrated circuit design field. To our knowledge, this is the only book on the market that covers circuits for emerging technologies beyond standard CMOS circuit books.

The book is divided into four parts. Part I covers digital design and power management. Traditional constant-field scaling has led CMOS technology to continuous improvements in speed performances while maintaining constant power density. However, continuous increase in energy consumption as a result of that scaling has become the major concern limiting the speed performances of VLSI integrated circuits. For these reasons, power optimization and power management is a major focus of the first part. Part II covers analog and RF wireless circuits. Various chapters have been included to address SOI technology, low-power design, frequency control, and LED displays. The increasing demand for portable communication systems has motivated coverage of development on wireless transceivers. Device layout and reliability topics are covered in Part III. Major emphasis has been placed on dealing with parasitic effects in device layout and reliability concerned in nanoscale MOSFETs. Finally, the book concludes with Part IV that covers ever-increasingly issue of device testing.

With such a wide variety of topics covered, I am hoping that the reader will find something stimulating to read, and discover the field of CMOS integrated circuits to be both exciting and useful in science and everyday life. Books like this one would not possible without many creative individuals meeting together in one place to exchange thoughts and ideas in a relaxed atmosphere. I would like to invite you to attend CMOS Emerging Technologies events that are held annually in beautiful British Columbia, Canada, where many topics covered in this book are discussed. See http://www.cmoset.com for presentation slides from the previous meeting and announcements about future ones. Hope to see you there!

KRIS INIEWSKI

Vancouver, 2012

Contributors

Massimo Alioto, Department of Information Engineering, University of Siena, Siena, Italy

Paolo Arcioni, Dipartimento di Elettronica, Università di Pavia, Pavia, Italy

Davide Bertozzi, ENDIF, University of Ferrara, Ferrara, Italy

David Bol, ICTEAM Institute, Université Catholique de Louvain, Louvain-la-Neuve, Belgium

Sleiman Bou-Sleiman, Analog VLSI Lab, The Ohio State University, Columbus, OH, USA

Yu Cao, Arizona State University, Tempe, AZ, USA

Gyu-Hyeong Cho, Division of Electrical Engineering, School of Electrical Engineering and Computer Science, KAIST, Daejeon, Korea

Elio Consoli, Department of Electrical, Electronic and Systems Engineering, University of Catania, Catania, Italy

Hooman Darabi, Broadcom, Irvine, CA, USA

Tawab Dastagir, Arizona State University, Tempe, AZ, USA

Wissam Eyssa, Dipartimento di Elettronica, Università di Pavia and Istituto Universitario di Studi Superiori di Pavia, Pavia, Italy

Huey Chian Foong, Nanyang Technological University, Singapore

Nathaniel Gaskin, IDT, San Jose, CA, USA

Francisco Gilabert, Universidad Politécnica de Valencia, Valencia, Spain

Mark Greenstreet, University of British Columbia, Vancouver, BC, Canada

Vidyabhusan Gupta, IDT, San Jose, CA, USA

Tetsuya Hirose, Kobe University, Nada, Kobe, Japan

Lou Hutter, Dongbu HiTek, Santa Clara, CA, USA

Mohammed Ismail, Analog VLSI Lab, The Ohio State University, Columbus, OH, USA

Pablo Ituero, Universidad Politécnica de Madrid, Madrid, Spain

Felicia James, Dongbu HiTek, Santa Clara, CA, USA

Henrik Jensen, Broadcom, Irvine, CA, USA

Yong-Joon Jeon, Division of Electrical Engineering, School of Electrical Engineering and Computer Science, KAIST, Daejeon, Korea

Yusuf Leblebici, Microelectronic Systems Laboratory, Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland

Marisa López-Vallejo, Universidad Politécnica de Madrid, Madrid, Spain

Daniele Ludovici, ENDIF, University of Ferrara, Ferrara, Italy

Yiorgos Makris, Electrical Engineering Department, Yale University, New Haven, CT, USA

Andrew Marshall, Texas Instruments Incorporated, Dallas, TX, USA

Michael S. McCorquodale, IDT, San Jose, CA, USA

Bradley A. Minch, Franklin W. Olin College of Engineering, Needham, MA, USA

Gaetano Palumbo, Department of Electrical, Electronic and Systems Engineering, University of Catania, Catania, Italy

Bipul C. Paul, GlobalFoundries, Hopewell Junction, NY, USA

Matteo Repossi, STMicroelectronics, Pavia, Italy

Selahattin Sayil, Lamar University, Beaumont, TX, USA

Alexandre Schmid, Microelectronic Systems Laboratory, Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland

Saurabh Sinha, Arizona State University, Tempe, AZ, USA

Milos Stanisavljevic, Microelectronic Systems Laboratory, Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland

Alessandro Strano, ENDIF, University of Ferrara, Ferrara, Italy

Haralampos-G. Stratigopoulos, TIMA Laboratory (CNRS—Grenoble INP—UJF), Grenoble, France

Francesco Svelto, Dipartimento di Elettronica, Università di Pavia, Pavia, Italy

Armin Tajalli, Microelectronic Systems Laboratory, Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland

Yen Kheng Tan, Energy Research Institute, Nanyang Technological University, Singapore

Ken Ueno, Hokkaido University, Sapporo, Japan

Federico Vecchi, Dipartimento di Elettronica, Universitá di Pavia and Istituto Universitario di Studi Superiori di Pavia, Pavia, Italy

Ping-Ying Wang, MediaTek Inc., Hsinchu, Taiwan

Xiaoqing Wen, Kyushu Institute of Technology, Iizuka, Fukuoka, Japan

Hao Wu, Arizona State University, Tempe, AZ, USA

Wei Xu, Arizona State University, Tempe, AZ, USA

Suwen Yang, University of British Columbia, Vancouver, BC, Canada

Hongbin Yu, Arizona State University, Tempe, AZ, USA

Yuanjin Zheng, Nanyang Technological University, Singapore

Alireza Zolfaghari, Broadcom, Irvine, CA, USA

Yervant Zorian, Synopsys, Inc., Mountain View, CA, USA

Part I

Digital Design and Power Management