Digital Electronics 1 E-Book

Tertulien Ndjountche

• Herausgeber: John Wiley & Sons
• Kategorie: Wissenschaft und neue Technologien
• Sprache: Englisch

Seitenzahl: 213

Veröffentlichungsjahr: 2016

Beschreibung

The omnipresence of electronic devices in our everyday lives has been accompanied by the downscaling of chip feature sizes and the ever increasing complexity of digital circuits. This book is devoted to the analysis and design of digital circuits, where the signal can assume only two possible logic levels. It deals with the basic principles and concepts of digital electronics. It addresses all aspects of combinational logic and provides a detailed understanding of logic gates that are the basic components in the implementation of circuits used to perform functions and operations of Boolean algebra. Combinational logic circuits are characterized by outputs that depend only on the actual input values. Efficient techniques to derive logic equations are proposed together with methods of analysis and synthesis of combinational logic circuits. Each chapter is well structured and is supplemented by a selection of solved exercises covering logic design practices.

Leseprobe

Table of Contents

Cover

Title

Copyright

Preface

1. Summary

2. The reader

1 Number Systems

1.1. Introduction

1.2. Decimal numbers

1.3. Binary numbers

1.4. Octal numbers

1.5. Hexadecimal numeration

1.6. Representation in a radix B

1.7. Binary-coded decimal numbers

1.8. Representations of signed integers

1.9. Representation of the fractional part of a number

1.10. Arithmetic operations on binary numbers

1.11. Representation of real numbers

1.12. Data representation

1.13. Codes to protect against errors

1.14. Exercises

1.15. Solutions

2 Logic Gates

2.1. Introduction

2.2. Logic gates

2.3. Three-state buffer

2.4. Logic function

2.5. The correspondence between a truth table and a logic function

2.6. Boolean algebra

2.7. Multi-level logic circuit implementation

2.8. Practical considerations

2.9. Demonstration of some Boolean algebra identities

2.10. Exercises

2.11. Solutions

3 Function Blocks of Combinational Logic

3.1. Introduction

3.2. Multiplexer

3.3. Demultiplexer and decoder

3.4. Implementation of logic functions using multiplexers or decoders

3.5. Encoders

3.6. Transcoders

3.7. Parity check generator

3.8. Barrel shifter

3.9. Exercises

3.10. Solutions

4 Systematic Methods for the Simplification of Logic Functions

4.1. Introduction

4.2. Definitions and reminders

4.3. Karnaugh maps

4.4. Systematic methods for simplification

4.5. Exercises

4.6. Solutions

Bibliography

Index

End User License Agreement

List of Tables

1 Number Systems

Table 1.1.

Conversion tables for 0 numbers to 15

Table 1.2.

Representations of unsigned and signed 3-bit integers

Table 1.3.

Range of numbers that can be represented with the IEEE-754 standard

Table 1.4.

Number format based on the IEEE-754 standard

Table 1.5.

Values of numbers in IEEE-754 representations

Table 1.6.

Binary and Gray code representation of decimal numbers from

0

to

15

Table 1.7.

Examples of 2 -out-of-5 code

Table 1.8.

ASCII codes table

2 Logic Gates

Table 2.1.

Truth table. Input: A; Output: B

Table 2.2.

Truth table. Inputs: A, B; Output: C

Table 2.3.

Truth table. Inputs: A, B; output: C

Table 2.4.

Truth table. Inputs: A, B; Output: C

Table 2.5.

Truth table

Table 2.6.

Truth table (sum of products)

Table 2.7.

Truth table (product of sums)

Table 2.8.

Truth table (sum of products)

Table 2.9.

Basic properties for the NOT, AND and OR operations

Table 2.10.

Truth table

Table 2.11.

Truth table for

Table 2.12.

Truth table for and

Table 2.13.

Basic properties for the XOR and XNOR operations

Table 2.14.

Truth table

Table 2.15.

Truth table

3 Function Blocks of Combinational Logic

Table 3.1.

Truth table of the 2-to-1 multiplexer

Table 3.2.

Truth table of a 2:1 multiplexer

Table 3.3.

Truth table of a 2-to-1 multiplexer

Table 3.4.

Truth table for the multiplexer shown in Figure 3.6(a)

Table 3.5.

Truth table for the multiplexer shown in Figure 3.6(b)

Table 3.6.

Truth table for an 8-to-1 multiplexer

Table 3.7.

Truth table for the decoder

Table 3.8.

Truth table for the decoder

Table 3.9.

Truth table of a 1-to-2 demultiplexer

Table 3.10.

Truth table of the 1-to-2 demultiplexer

Table 3.11.

Truth table of a 2-out-of-4 decoder

Table 3.12.

Truth table of a 1-to-4 demultiplexer

Table 3.13.

Truth table for an 1-to-8 demultiplexer

Table 3.14.

Truth table for the logic function Y

Table 3.15.

Truth table (case 1)

Table 3.16.

Truth table (case 2)

Table 3.17.

Truth table of the 4 : 2 encoder with a validation output

Table 3.18.

Truth table for an 8 : 3 encoder

Table 3.19.

Truth table for a 4:2 priority encoder

Table 3.20.

Truth table for 4 : 2 priority encoder with cascading capability

Table 3.21.

Truth table for the 8 : 3 priority encoder

Table 3.22.

Conversion of decimal numbers from 0 to 9 into binary representation

Table 3.23.

Truth table for the priority encoder 74LS147

Table 3.24.

Binary and Gray code for numbers from 0 to 15

Table 3.25.

BCD to XS-3 conversion table

Table 3.26.

BCD to XS-3 conversion table

Table 3.27.

Example of three 8-bit words with parity bits

Table 3.28.

Truth table for a parity generator for 4-bit words

Table 3.29.

Table illustrating the operation of the parity generator/controller

Table 3.30.

Operations realized by the barrel shifter

Table 3.31.

Truth table of the barrel shifter

Table 3.32.

Truth table of the 4-bit barrel shifter

Table 3.33.

Truth table of the function F

(

A

,

B

,

C

)

Table 3.34.

Truth table of the 2-out-of-4 decoder

Table 3.35.

Truth table of the 2-out-of-2 decoder

Table 3.36.

Truth table of the

8 : 3

priority encoder

Table 3.37.

Truth table of the logic function F

Table 3.38.

Truth table of the 2-out-of-4 decoder

Table 3.39.

Truth table of the 1-to-4 demultiplexer

Table 3.40.

Truth table

Table 3.41.

Truth table

Table 3.42.

Truth table of the 8-to-1 multiplexer

Table 3.43.

Truth table

Table 3.44.

Truth table of a multiplier for 2-bit words

Table 3.45.

Truth table of a comparator for 2-bit numbers

Table 3.46.

Truth table of the BCD-to-7-segment decoder

Table 3.47.

Truth table of the HEX-to-7-segment decoder

Table 3.48.

Truth table of the barrel shifter

Table 3.49.

Truth table of the barrel shifter for right-shift operations

4 Systematic Methods for the Simplification of Logic Functions

Table 4.1.

Truth table

Table 4.2.

Table to determine prime implicants

Table 4.3.

Table to determine the prime implicants using the consensus theorem

Table 4.4.

Prime implicant chart for F

Table 4.5.

Table for the determination of prime implicants

Table 4.6.

Prime implicant chart for F: a) complete form and b) reduced form

Table 4.7.

Table for the determination of prime implicants

Table 4.8.

Prime implicant chart for F

Table 4.9.

Reduced forms of the prime implicant charts for

F

Table 4.10.

Table for the determination of prime implicants

Table 4.11.

Prime implicant chart for F

Table 4.12.

Table for the determination of prime implicants

Table 4.13.

Prime implicants chart for F

Table 4.14.

Table for the determination of prime implicants

Table 4.15.

Table for the determination of prime implicants using the consensus method

Table 4.16.

Prime implicant chart for the functions

F

,

G

and

F

·

G

Table 4.17.

Reduced form of the prime implicant chart for the functions

F

,

G

and

F

· G

Table 4.18.

Table for the determination of the prime implicants of Z

1

Table 4.19.

Prime implicant chart for Z

1

Table 4.20.

Table for the determination of the prime implicants of Z

2

Table 4.21.

Prime implicant chart for Z

2

Table 4.22.

Table for the determination of the prime implicants of Z

3

Table 4.23.

Prime implicant chart for Z

3

Table 4.24.

Reduced prime implicant chart for Z

3

Table 4.25.

Table for the determination of the prime implicants of Z

4

Table 4.26.

Prime implicant chart for Z

4

Guide

Cover

Table of Contents

Begin Reading

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Series EditorRobert Baptist

Digital Electronics 1

Combinational Logic Circuits

Tertulien Ndjountche

First published 2016 in Great Britain and the United States by ISTE Ltd and John Wiley & Sons, Inc.

Apart from any fair dealing for the purposes of research or private study, or criticism or review, as permitted under the Copyright, Designs and Patents Act 1988, this publication may only be reproduced, stored or transmitted, in any form or by any means, with the prior permission in writing of the publishers, or in the case of reprographic reproduction in accordance with the terms and licenses issued by the CLA. Enquiries concerning reproduction outside these terms should be sent to the publishers at the undermentioned address:

ISTE Ltd

27-37 St George’s Road

London SW19 4EU

UK

www.iste.co.uk

John Wiley & Sons, Inc.

111 River Street

Hoboken, NJ 07030

USA

www.wiley.com

© ISTE Ltd 2016

The rights of Tertulien Ndjountche to be identified as the author of this work have been asserted by him in accordance with the Copyright, Designs and Patents Act 1988.

Library of Congress Control Number: 2016939642

British Library Cataloguing-in-Publication Data

A CIP record for this book is available from the British Library

ISBN 978-1-84821-984-7

Preface

The omnipresence of electronic devices in everyday life is accompanied by the decreasing size and the ever-increasing complexity of digital circuits. This comprehensive and easy-to-understand work deals with the basic principles of digital electronics and allows the reader to grasp the subtleties of digital circuits, from logic gates to finite-state machines. It presents all the aspects related to combinational logic and sequential logic. It introduces techniques for simply and concisely establishing logic equations as well as methods for the analysis and design of digital circuits. Emphasis has been especially laid on design approaches that can be used to ensure a reliable operation of finite-state machines. Various programmable logic circuit structures and their applications have also been presented. Each chapter is completed by practical examples and well-designed exercises that are accompanied by worked solutions.