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- Herausgeber: John Wiley & Sons
- Kategorie: Wissenschaft und neue Technologien
- Serie: Wiley - IEEE
- Sprache: Englisch
Building on the success of the previous three editions, Foundations for Microstrip Circuit Design offers extensive new, updated and revised material based upon the latest research. Strongly design-oriented, this fourth edition provides the reader with a fundamental understanding of this fast expanding field making it a definitive source for professional engineers and researchers and an indispensable reference for senior students in electronic engineering.
Topics new to this edition: microwave substrates, multilayer transmission line structures, modern EM tools and techniques, microstrip and planar transmision line design, transmission line theory, substrates for planar transmission lines, Vias, wirebonds, 3D integrated interposer structures, computer-aided design, microstrip and power-dependent effects, circuit models, microwave network analysis, microstrip passive elements, and slotline design fundamentals.
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Veröffentlichungsjahr: 2016
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Table of Contents
Cover
Title Page
Copyright
List of Trademarks
Dedication
Preface
Acknowledgements
Chapter 1: Introduction to Design Using Microstrip and Planar Lines
1.1 Introduction
1.2 Origins of Microstrip
1.3 RF and Microwave Modules
1.4 Interconnections on RF and Microwave Integrated Circuits
1.5 High-speed Digital Interconnections
1.6 Summary
References
Chapter 2: Fundamentals of Signal Transmission on Interconnects
2.1 Introduction
2.2 Transmission Lines and Interconnects
2.3 Interconnects as Part of a Packaging Hierarchy
2.4 The Physical Basis of Interconnects
2.5 The Physics, a Guided Wave
2.6 When an Interconnect Should be Treated as a Transmission Line
2.7 The Concept of RF Transmission Lines
2.8 Primary Transmission Line Constants
2.9 Secondary Constants for Transmission Lines
2.10 Transmission Line Impedances
2.11 Reflection
2.12 Multiple Conductors
2.13 Return Currents
2.14 Modeling of Interconnects
2.15 Summary
References
Chapter 3: Microwave Network Analysis
3.1 Introduction
3.2 Two-port Networks
3.3 Scattering Parameter Theory
3.4 Signal-flow Graph Techniques and Parameters
3.5 Summary
References
Chapter 4: Transmission Line Theory
4.1 Introduction
4.2 Transmission Line Theory
4.3 Chain (
ABCD
) Parameters for a Uniform Length of Loss-free Transmission Line
4.4 Change in Reference Plane
4.5 Working With a Complex Characteristic Impedance
4.6 Summary
References
Chapter 5: Planar Interconnect Technologies
5.1 Introductory Remarks
5.2 Microwave Frequencies and Applications
5.3 Transmission Line Structures
5.4 Substrates for Planar Transmission Lines
5.5 Thin-film Modules
5.6 Thick-film Modules
5.7 Monolithic Technology
5.8 Printed Circuit Boards
5.9 Multichip Modules
5.10 Summary
References
Chapter 6: Microstrip Design at Low Frequencies
6.1 The Microstrip Design Problem
6.2 The Quasi-TEM Mode of Propagation
6.3 Static-TEM Parameters
6.4 Effective Permittivity and Characteristic Impedance of Microstrip
6.5 Filling Factor
6.6 Approximate Graphically Based Synthesis
6.7 Formulas for Accurate Static-TEM Design Calculations
6.8 Electromagnetic Analysis-based Techniques
6.9 A Worked Example of Static-TEM Synthesis
6.10 Microstrip on a Dielectrically Anisotropic Substrate
6.11 Microstrip and Magnetic Materials
6.12 Effects of Finite Strip Thickness, Metallic Enclosure, and Manufacturing Tolerances
6.13 Pulse Propagation along Microstrip Lines
6.14 Recommendations Relating to the Static-TEM Approaches
6.15 Summary
References
Chapter 7: Microstrip at High Frequencies
7.1 Introduction
7.2 Frequency-dependent Effects
7.3 Approximate Calculations Accounting for Dispersion
7.4 Accurate Design Formulas
7.5 Effects due to Ferrite and to Dielectrically Anisotropic Substrates
7.6 Field Solutions
7.7 Frequency Dependence of Microstrip Characteristic Impedance
7.8 Multimoding and Limitations on Operating Frequency
7.9 Design Recommendations
7.10 Summary
References
Chapter 8: Loss and Power-dependent Effects in Microstrip
8.1 Introduction
8.2 Factor as a Measure of Loss
8.3 Power Losses and Parasitic Effects
8.4 Superconducting Microstrip Lines
8.5 Power-handling Capabilities
8.6 Passive Intermodulation Distortion
8.7 Summary
References
Chapter 9: Discontinuities in Microstrip
9.1 Introduction
9.2 The Main Discontinuities
9.3 Bends in Microstrip
9.4 Step Changes in Width (Impedance Step)
9.5 The Narrow Transverse Slit
9.6 Microstrip Junctions
9.7 Recommendations for the Calculation of Discontinuities
9.8 Summary
References
Chapter 10: Parallel-coupled Microstrip Lines
10.1 Introduction
10.2 Coupled Transmission Line Theory
10.3 Formulas for Characteristic Impedance of Coupled Lines
10.4 Semi-empirical Analysis Formulas as a Design Aid
10.5 An Approximate Synthesis Technique
10.6 Summary
References
Chapter 11: Applications of Parallel-coupled Microstrip Lines
11.1 Introduction
11.2 Directional Couplers
11.3 Design Example: Design of a 10 dB Microstrip Coupler
11.4 Frequency- and Length-Dependent Characteristics of Directional Couplers
11.5 Special Coupler Designs with Improved Performance
11.6 Thickness Effects, Power Losses, and Fabrication Tolerances
11.7 Choice of Structure and Design Recommendations
11.8 Summary
References
Chapter 12: Microstrip Passive Elements
12.1 Introduction
12.2 Lumped Elements
12.3 Terminations and Attenuators
12.4 Microstrip Stubs
12.5 Hybrids and Couplers
12.6 Power Combiners and Dividers
12.7 Baluns
12.8 Integrated Components
12.9 Summary
References
Chapter 13: Stripline Design
13.1 Introduction
13.2 Symmetrical Stripline
13.3 Asymmetrical Stripline
13.4 Suspended Stripline
13.5 Coupled Stripline
13.6 Double-sided Stripline
13.7 Discontinuities
13.8 Design Recommendations
13.9 Summary
References
Chapter 14: CPW Design Fundamentals
14.1 Introduction to Properties of Coplanar Waveguide
14.2 Modeling CPWs
14.3 Formulas for Accurate Calculations
14.4 Loss Mechanisms
14.5 Dispersion
14.6 Discontinuities
14.7 Circuit Elements
14.8 Variants on the Basic CPW Structure
14.9 Summary
References
Chapter 15: Slotline
15.1 Introduction
15.2 Basic Concept and Structure
15.3 Operating Principles and Modes
15.4 Propagation and Dispersion Characteristics
15.5 Evaluation of Guide Wavelength and Characteristic Impedance
15.6 Losses
15.7 End-effects: Open Circuits and Short Circuits
15.8 Summary
References
Chapter 16: Slotline Applications
16.1 Introduction
16.2 Comparators and Couplers
16.3 Filter Applications
16.4 Magic T
16.5 The Marchand Balun
16.6 Phase Shifters
16.7 Isolators and Circulators
16.8 A Double-sided, Balanced Microwave Circuit
16.9 Summary
References
Chapter 17: Transitions
17.1 Introduction
17.2 Coaxial-to-microstrip Transitions
17.3 Waveguide-to-microstrip Transitions
17.4 Transitions between CPW and other Mediums
17.5 Slotline Transitions
17.6 Other Microstrip Transitions
17.7 Summary
References
Chapter 18: Measurements of Planar Transmission Line Structures
18.1 Introduction
18.2 Instrumentation Systems for Microstrip Measurements
18.3 Measurement of Scattering Parameters
18.4 Measurement of Substrate Properties
18.5 Microstrip Resonator Methods
18.6 Factor Measurements
18.7 Measurements of Parallel-coupled Microstrips
18.8 Time-domain Reflectometry Techniques
18.9 Summary
References
Chapter 19: Filters Using Planar Transmission Lines
19.1 Introduction
19.2 Filter Prototypes
19.3 Microstrip Filters
19.4 Microstrip Bandpass Filters
19.5 Parallel-coupled Line Bandpass Filters
19.6 Filter Design Accounting for Losses
19.7 Dielectric Resonators and Filters Using Them
19.8 Spurline Bandstop Filters
19.9 Summary
References
Chapter 20: Magnetic Materials and Planar Transmission Lines
20.1 Introduction
20.2 Microwave Magnetic Materials
20.3 Effective Permeability of Magnetic Materials
20.4 Microstrip on a Ferrite Substrate
20.5 Isolators and Circulators
20.6 Transmission Lines Using Metaconductors
20.7 Frequency Selective Limiter
20.8 Summary
References
Chapter 21: Interconnects for Digital Systems
21.1 Introduction
21.2 Overview of On-chip Interconnects
21.3 Modeling of On-chip Interconnects
21.4 Modeling Inductance
21.5 Clock Distribution
21.6 Resonant Clock Distribution
21.7 Summary
References
Appendix A: Physical and Mathematical Properties
A.1 SI Units
A.2 SI Prefixes
A.3 Physical and Mathematical Constants
A.4 Basis of Electromagnetic SI Units
A.5 Relationship of SI Units to CGS Units
Appendix B: Material Properties
References
Appendix C: RF and Microwave Substrates
C.1 Hard substrates
C.2 Soft Substrates
Index
End User License Agreement
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Guide
Cover
Table of Contents
Preface
Begin Reading
List of Illustrations
Chapter 1: Introduction to Design Using Microstrip and Planar Lines
Figure 1.1 Microstrip transmission line.
Figure 1.2 Evolution of the stripline transmission line: (a) coaxial line with a round center conductor; (b) square coaxial line with a square center conductor; (c) rectangular coaxial line with a flat center conductor; and (d) stripline.
Figure 1.3 A 14.4–15.35 GHz receiver module itself consisting of cascaded modules interconnected by microstrip transmission lines. Surrounding the microwave circuit are DC conditioning and control circuitry. RF in is 14.4–15.35 GHz, LO in is 1600.625–1741.875 MHz. The frequency of the IF is 70–1595 MHz. © M. Steer, used with permission.
Figure 1.4 Microstrip bends: (a) detail of bend from the reference LO section of Figure 1.3; (b) layout representation of a microstrip transmission line; (c) microstrip rectangular bend; (d) partially mitered bend; and (e) mitered microstrip bend.
Figure 1.5 Frequency conversion section of the 15 GHz receiver of Figure 1.3: (a) annotated photograph; and (b) block diagram. The frequencies identified in (a) are the center frequency of the LO range (1.67 GHz) and the center frequency of the RF signal (14.9 GHz). The center frequency of the resulting IF signal is at 1.43 GHz. © M. Steer, used with permission.
Figure 1.6 Detail of the transition from softboard to the frequency conversion section. © M. Steer, used with permission.
Figure 1.7 Component sub-modules of the frequency conversion section of the 15 GHz receiver of Figure 1.5: (a) edge-coupled parallel-coupled microstrip line bandpass filter; (b) microstrip lowpass filter; and (c) microstrip mitered bend. © M. Steer, used with permission.
Figure 1.8 Bond structures: (a) wire bonds; and (b) ribbon bond. © M. Steer, used with permission.
Figure 1.9 IF section of the 15 GHz receiver of Figure 1.3: (a) annotated image; and (b) block diagram. © M. Steer, used with permission.
Figure 1.10 Channel arrangement of the 15 GHz fixed wireless service based on a 28 MHz channel spacing.
Figure 1.11 GaAs X-band MMIC 8–12 GHz amplifier showing the RF input, RF, and output RF. S indicates a stub, SO indicates the output stub with a spiral inductor, and F indicates a feedback RF path with a spiral inductor.
Figure 1.12 A CPW with a strip carrying the signal current and the signal return on the ground strips on either side of the signal carrying strip: (a) CPW on the surface of a substrate; (b) a coaxial-to-CPW adaptor, a GSG probe, formed by extending and shaping the center conductor of a coaxial line, and welding needles to the outer conductor of the coaxial line shown here probing an integrated circuit.
Figure 1.13 Scanning electron micrograph of a silicon integrated circuit showing a multilevel interconnect structure of a digital chip. The first (bottom) level is tungsten, as are the vias. The other metal levels are copper. The perspective was obtained after removal by etching of the oxide dielectric. From IBM web page. © IBM, used with permission.
Chapter 2: Fundamentals of Signal Transmission on Interconnects
Figure 2.1 Coaxial transmission line with a voltage source applying a pulse: (a) three-dimensional view; (b) its longitudinal cross-section; (c) the output of the pulse generator in time; and (d) the fields at the beginning of the line at time .
Figure 2.2 Coaxial transmission line with pulsed voltage source showing voltage at different times. The plus and minus signs indicate net charge.
Figure 2.3 Cross-sections of some common TEM-mode transmission lines: (a) parallel two-wire transmission line; (b) coaxial line; (c) stripline; and (d) perspective of a stripline.
Figure 2.4 Cross-sectional view of a microstrip interconnect: (a) the electric and magnetic field lines, and positive and negative charges; and (b) current flow. The electric and magnetic fields are in two mediums, the dielectric and air.
Figure 2.5 Cross-sectional view of the charge distribution on an interconnect at different frequencies: (a) DC; (b) 100 MHz; and (c) 1 GHz. The dots and crosses indicate charge concentrations of different polarity.
Figure 2.6 Dispersion of a pulse along an interconnect.
Figure 2.7 The uniform transmission line: (a) transmission line of length ; and (b) primary constants assigned to a lumped-element model of a transmission line.
Figure 2.8 Notation applicable to a general, uniform line.
Figure 2.9 Line terminations: (a) short-circuit termination with being the impedance looking into the short-circuited line; and (b) open-circuit with being the impedance looking into the open-circuited line.
Figure 2.10 Reflection of a pulse at a load that is lower in resistance than the characteristic impedance of the line.
Figure 2.11 Reflection of a pulse at a load that is higher in resistance than the characteristic impedance of the line.
Figure 2.12 Reflection of a pulse on an interconnect showing forward and backward traveling pulses.
Figure 2.13 A digital signal in an interconnect: (a) resulting from multiple reflections; and (b) sources of reflection.
Figure 2.14 Two parallel-coupled transmission lines.
Figure 2.15 Parallel-coupled coaxial lines: (a) fields; (b) even mode; and (c) odd mode. (For simplicity only the electric field is indicated in (b) and (c)).
Figure 2.16 Coupled microstrip lines in perspective.
Figure 2.17 Coupled microstrip lines showing the signal induced on the quiet (or victim) line due to a pulse on the driven line.
Figure 2.18 Signal paths going from an integrated circuit (IC) through a package to a printed circuit board.
Figure 2.19 Shared current return path forming a common impedance connection (a) and the voltage waveforms resulting (b).
Figure 2.20 A mixed signal system with (a) poor and (b) better isolation of analog and digital signal return paths.
Figure 2.21 model (a) of an interconnect and (b) incorporating a driver and a receiver.
Figure 2.22 Cross-section of a microstrip interconnect with a passivation covering layer modeled as a simplified structure with an idealized zero thickness microstrip line and an improved structure with multiple zero thickness metal lines.
Chapter 3: Microwave Network Analysis
Figure 3.1 A two-port network: (a) port voltages; and (b) with transmission lines at the ports.
Figure 3.2 Circuit equivalence of the and parameters for a reciprocal network: (a) parameters; and (b) parameters (in (b) the elements are admittances).
Figure 3.3 Cascade of two-port networks.
Figure 3.4 Two-port network with cascadable voltage and current definitions.
Figure 3.5 A two-port network.
Figure 3.6 A two-port network with input and output reference transmission lines.
Figure 3.7 A two-port network showing forward- and backward-traveling waves on the reference transmission lines.
Figure 3.8 Two-port network with root power variables.
Figure 3.9 A shunt susceptance element with admittance .
Figure 3.10 An -port network.
Figure 3.11 Two cascaded two-ports.
Figure 3.12 Two-port with parameters suitable for defining and parameters.
Figure 3.13 Terminated two-port used to define return loss.
Figure 3.14 Two-port insertion and definition of variables for defining insertion loss: (a) source and load before insertion; and (b) insertion of two-port network with source level unchanged.
Figure 3.15 SFG showing distribution of input reflection and output transfer to the response leaving port 1 of a two-port network.
Figure 3.16 Complete SFG of a two-port network.
Figure 3.17 SFG representation of addition.
Figure 3.18 Cascade reduction of SFG: (a) three cascaded blocks; and (b) reduced form.
Figure 3.19 SFG simplification eliminating a variable.
Figure 3.20 SFGs having a self-loop: (a) original SFG; and (b) after eliminating .
Figure 3.21 SFG of (a) a self-loop; and (b) with the loop eliminated.
Chapter 4: Transmission Line Theory
Figure 4.1 A two-port network with connecting transmission lines showing forward- and backward-traveling waves on the lines.
Figure 4.2 Standing wave pattern produced by a half-wave resonator.
Figure 4.3 Transmission line system with a single shunt stub.
Figure 4.4 Quarter-wave impedance transformer.
Figure 4.5 Equivalent two-port networks of a section of transmission line: (a) T network; and (b) network.
Figure 4.6 Simple equivalent network of a transmission line segment with and .
Figure 4.7 A two-port transmission line network used to define parameters.
Figure 4.8 Two-port measurement setup: (a) a two-port comprising an embedded two-port network and transmission line sections between reference planes 1 and 2; and (b) representation as cascaded two-port networks.
Chapter 5: Planar Interconnect Technologies
Figure 5.1 Common transmission line structures suited to planar fabrication.
Figure 5.2 Cross-sections: (a) conventional CPW; and (b) “inverted-V” CPW showing vias connecting conductor layers.
Figure 5.3 Cross-section view of an interconnect on a PCB.
Figure 5.4 An MCM-D interconnect: (a) cross-section of the second layer; and (b) longitudinal view showing vias. Adapted from Lipa
et al
. (1996) [48], Figure 1, p. 123. Reprinted with permission of IEEE.
Figure 5.5 Measured characteristic impedance of the microstrip interconnects shown in Figure 5.4 for three different line widths: (a) with the lines on layer 1; and (b) with the lines on layer 2.
Figure 5.6 Conductive and dielectric attenuation constants, and respectively, of an interconnect on a two-layer MCM-D: (a) first-layer metallization (layer 1); and (b) second-layer metallization (layer 2). Adapted from Lipa
et al
. (1996) [48], Figure 4 and 5, p. 124. Reprinted with permission of IEEE.
Chapter 6: Microstrip Design at Low Frequencies
Figure 6.1 Input network arrangement (a) and microstrip circuit (b) for a microwave transistor amplifier. The guide wavelength, , is the wavelength of the signal on the microstrip line.
Figure 6.2 The general geometry of a microstrip line, including choice of coordinates.
Figure 6.3 Transverse cross-section of microstrip, showing the electric field.
Figure 6.4 Three-dimensional views of the magnetic (a) and electric (b) fields surrounding a shielded microstrip line. The magnetic field lines in (a) alternate between dashed and solid to aid in clarity. For simplicity, only the electric field in the air and on the left-hand side of the strip is shown in (b).
Figure 6.5 A typical transverse cross-section of a shielded microstrip line showing representative magnetic () and electric () fields.
Figure 6.6 Microstrip lines: (a) extremely wide (); and (b) extremely narrow () lines.
Figure 6.7 Characteristic impedance of a microstrip line versus aspect ratios, , for various substrate relative permittivites, (From EM simulation).
Figure 6.8 Effective permittivity of a microstrip line versus aspect ratios, , for various substrate relative permittivites, (From EM simulation).
Figure 6.9 Normalized characteristic impedance and normalized effective permittivity of a microstrip line as a function of .
Figure 6.10 Filling factor for a microstrip line versus aspect ratios, , for various substrate relative permittivites, . Results calculated using electromagnetic simulation except for the curve identified as ‘Formula’, which was calculated using Equation (6.32).
Figure 6.11 Curves for the graphical analysis or synthesis of microstrip: is the free-space characteristic impedance and is the filling factor as a function of aspect ratio . (Developed using Sonnet with a frequency of 100 MHz and the curves evaluated with ).
Figure 6.12 Electric field distributions, in the transverse plane, applicable to microstrip on an anisotropic substrate (sapphire) for three shape () ratios: (a) small, (b) moderate and (c) large. The direction is out of the page.
Figure 6.13 Illustrating the concept of equivalent isotropic substrate relative permittivity (): (a) sapphire substrate; and (b) equivalent isotropic substrate.
Figure 6.14 Design curves for microstrip lines on a sapphire substrate (C axis perpendicular to the ground plane). Curve I uses as “”. Curve II uses from Equation (6.55): (a) equivalent relative permittivity; (b) effective relative permittivity; and (c) characteristic impedance. Adapted from Owens
et al.
(1976) [20], Figure 6.3–6.5, pp. 502–503. Reproduced with permission of IEEE.
Figure 6.15 A model for microstrip on an anisotropic substrate with C axis perpendicular to the ground plane.
Figure 6.16 Changes in the distribution of electric field (transverse cross-section) as the thickness of microstrip is altered.
Figure 6.17 Cross-section of shielded microstrip: .
Figure 6.18 A microstrip circuit structure yielding substantial delay: (a) microstrip layout; and (b) equivalent circuit.
Chapter 7: Microstrip at High Frequencies
Figure 7.1 The dispersive effect in any general structure or system, non-linearity when frequency is plotted against wave number or phase coefficient .
Figure 7.2 Transverse cross-section of shielded microstrip, showing the nomenclature. The strip is the conductor of width and the ground plane is the bottom, grounded conductor.
Figure 7.3 Normalized current and charge magnitudes on an alumina microstrip line at 1 GHz: (a) normalized scale; (b) longitudinal current, , on the strip and (c) on the ground plane; and (d) the charge on the strip and (e) on the ground plane.
Figure 7.4 Normalized current and charge magnitudes on an alumina microstrip line at 10 GHz: (a) normalized scale; (b) longitudinal current, , on the strip and (c) on the ground plane; and (d) the charge on the strip and (e) on the ground plane.
Figure 7.5 Normalized current and charge magnitudes in an alumina microstrip line at 30 GHz: (a) normalized scale; (b) longitudinal current, on the strip and (c) on the ground plane; and (d) the charge on the strip and (e) on the ground plane.
Figure 7.6 Normalized instantaneous current distribution on the microstrip line: (a) normalized scale; (b) magnitude of the longitudinal current, , on the microstrip and (c) on the ground plane; and (d) magnitude of the transverse current, , on the microstrip and (e) on the ground plane. In all cases an alumina substrate applies and the frequency is 30 GHz.
Figure 7.7 Normalized instantaneous charge distribution, , on the microstrip line at 30 GHz: (a) scale; (b) strip; and (c) ground plane.
Figure 7.8 Dispersion of microstrip interpreted as an effective relative permittivity plotted to a base of frequency.
Figure 7.9 Steady-state description of the skin effect: (a) an electromagnetic wave from the left incident at the interface of air and a conductor; and (b) profiles of the electric field magnitude (top) and current magnitude (bottom) as the wave travels into the conductor.
Figure 7.10 Representation of a microstrip line as groups of current filaments.
Figure 7.11 Current density on the strip and finite-thickness ground plane shown in cross-section. Dark shading indicates the area of high current density and different scales are used for the current density on the strip and on the ground plane. Current density in the ground plane is much lower than in the strip.
Figure 7.12 Skin effect on the transverse current density in a strip of a microstrip transmission line for various thicknesses of strip, , relative to a skin depth : (a) is at DC; (b), (c), and (d) are for thicknesses near the skin depth; and (d) and (e) have the same thickness but the strips have different widths.
Figure 7.13 Getsinger's model for dispersion analysis: (a) actual microstrip; and (b) microstrip model. Adapted from Getsinger (1973) [37], Figure 2, p. 35. Reproduced with permission of IEEE.
Figure 7.14 A comparison of the results derived from five different dispersion calculation techniques for a microstrip line on a 650 m thick substrate with . Simulated results were obtained using SONNET.
Figure 7.15 Dispersion curves applicable to three microstrip lines on an alumina substrate ().
Figure 7.16 Dispersion of microstrip with gold metallization on a m-thick GaAs substrate with and a strip width of m. Simulation results were obtained using SONNET. RMS error relative to EM simulation: Getsinger 1.4%, Kobayashi 0.8%, and Kirschning and Jansen 0.2%.
Figure 7.17 Frequency dependence of the real and imaginary parts of of a gold microstrip line and alumina substrate with = 9.9 and = = 635 m.
Figure 7.18 Frequency dependence of the real and imaginary parts of of a gold microstrip line and alumina substrate with = 9.9 and = = 635 m.
Figure 7.19 Comparative dispersion curves for microstrip on a GaAs substrate ( = 13, = 0.254 mm, = 0.127 mm). Simulated results were calculated using SONNET.
Figure 7.20 Microstrip propagation coefficient as a function of frequency. Adapted from Hsia
et al.
(1990) [45], Figure 2(a), p. 667. Reproduced with the permission of IEEE.
Figure 7.21 Effective permittivity for shielded microstrip. Adapted from Dumbell
et al.
(1989) [60], Figure 5, p. 764. Reproduced with the permission of the European Microwave Association.
Figure 7.22 Effective permittivity for shielded microstrip with dielectric overlay. Adapted from Dumbell
et al.
(1989) [60], Figure 7, p. 765. Reproduced with the permission of the European Microwave Association.
Figure 7.23 Simulation results for the propagation of a 35 ps single-sided exponential pulse along 50 microstrip lines on a GaAs substrate. Adapted from Qian and Yamashita (1990) [61], Figure 3, p. 954. Reproduced with permission of IEEE.
Figure 7.24 Planar waveguide model for microstrip.
Figure 7.25 Transverse resonance: standing wave () and equivalent transmission line of “length” ().
Figure 7.26 An (isotropic) substrate viewed as a dielectric slab, showing the nomenclature.
Figure 7.27 Eigenvalue solutions for TM waves for various normalized substrate thickness, .
Figure 7.28 TM threshold excitation frequency as a function of substrate thickness and relative permittivity .
Chapter 8: Loss and Power-dependent Effects in Microstrip
Figure 8.1 Parallel (a) and series (b) resonant circuits.
Figure 8.2 Transfer characteristic of resonant circuit.
Figure 8.3 Gap coupled quarter-wave section.
Figure 8.4 Open-circuited microstrip resonator.
Figure 8.5 Reflection diagram.
Figure 8.6 Parameters governing the choice of substrate for any microstrip application: acceptable factor, operating frequency, substrate thickness, and relative permittivity . Adapted from Vendelin (1970) [1], Figure 2, p. 65. Reprinted with permission of Horizon House.
Figure 8.7 Power losses versus frequency for open-end discontinuity (, mm, mm). Adapted from Horng
at al.
(1990) [9], Figure 5, p. 1804. Reprinted with permission of IEEE.
Figure 8.8 Losses in microstrip on a GaAs substrate (350 m width on 100 m GaAs). The lines are simulated data. Adapted from Goldfarb and Platzker (1990) [10], Figure 5, p. 1959. Reprinted with permission of IEEE.
Figure 8.9 Attenuation coefficients at 77 K for superconducting and aluminum microstrip lines. Adapted from Lee
et al.
(1989) [22], Figure 2, p. 759. Reprinted with permission of the European Microwave Association.
Figure 8.10 Phase velocities at 77 K for superconducting and aluminum microstrip lines. Adapted from Lee
et al.
(1989) [22], Figure 3, p. 759. Reprinted with permission of the European Microwave Association.
Figure 8.11 Spectrum at the output of a transmission line generating PIM distortion tones. The input of the line consists of two discrete tones.
Figure 8.12 Microstrip tranmission line showing the skin effect region in which heat is generated. Adapted from Wilkerson
et al.
(2011) [27], Figure 1, p. 1191. Reproduced with permission of IEEE.
Figure 8.13 Comparison of measured and modeled PIM on a microstrip transmission line. Adapted from Wilkerson
et al.
(2011) [27], Figure 8, p. 1198. Reproduced with permission of IEEE.
Chapter 9: Discontinuities in Microstrip
Figure 9.1 Layout of a simple hybrid microwave amplifier using a GaAs MESFET, showing several discontinuities in the microstrip lines (DC bias filters are not shown).
Figure 9.2 Microstrip open circuit and gap: (a) layout with electric fields; and (b) equivalent lumped capacitive network.
Figure 9.3 Development of the equivalent end-effect length concept: (a) physical transmission line; (b) transmission line with equivalent end fringing capacitance ; and (c) transmission line with equivalent extra transmission line of length .
Figure 9.4 Normalized end-effect length () as a function of shape ratio for .
Figure 9.5 The series gap and its equivalent lumped circuit: (a) physical arrangement; and (b) lumped capacitive equivalent circuit.
Figure 9.6 A shunt metallized hole which may form a short circuit in a microstrip line.
Figure 9.7 Right-angled microstrip bend: (a) structure and nomenclature; and (b) equivalent circuit.
Figure 9.8 Lumped equivalent circuit for the microstrip bend calculated in the text.
Figure 9.9 Mitered, right-angled bend together with its equivalent circuit and parameter variations (as a function of the amount of miter): (a) structure and nomenclature; (b) equivalent circuit; and (c) parameter trends as a function of chamfer fraction (). (c) adapted from Easter
et al.
(1978) [17], Figure 11, p. 80. Reprinted with permission of IEEE.
Figure 9.10 Magnitude of the current densities on (a) a right-angled bend and (b) an optimally mitered bend (in both cases on alumina substrate at 10 GHz). The dark region corresponds to low current density.
Figure 9.11 Magnitude of the (a) horizontal and (b) vertical current densities on an optimally mitered right-angled bend under the same conditions as those shown in Figure 9.10.
Figure 9.12 Magnitude of the (a) horizontal and (b) vertical current densities on a right-angled bend under the same conditions as those shown in Figure 9.10.
Figure 9.13 Structure and equivalent circuit of the symmetrical microstrip step (change in width): (a) structure and nomenclature; and (b) equivalent circuit.
Figure 9.14 The symmetrical step, parameter variations: (a) capacitance; and (b) inductance for and . (a) adapted from Benedek and Silvester (1972) [9], Figure 8, p. 733. Reprinted with permission from IEEE. (b) adapted from Thomson
et al.
(1976) [18], Figure 4, p. 653. Reprinted with permission of IEEE.
Figure 9.15 Magnitude of the current densities for symmetrical step in width: (a) normalized scale (b) longitudinal current; and (c) transverse current. The signal is 10 GHz and the microstrip line is on alumina.
Figure 9.16 Structure and equivalent circuit of the asymmetrical microstrip step.
Figure 9.17 The narrow transverse slit: (a) actual slit; and (b) equivalent circuit.
Figure 9.18 The T junction in microstrip: (a) structure and nomenclature; and (b) equivalent circuit.
Figure 9.19 Parameter trends for the T junction: (a) ; and (b) (a) Adapted from Silvester and Benedek (1973) [12], Figure 8, p. 345. Reprinted with permission of IEEE. (b) Adapted from Easter
et al.
(1978) [17], Figure 17, p. 82. Reprinted with permission of the Institution of Engineering and Technology.
Figure 9.20 T junction: (a) reference planes, T and T, effective width , and dimensions; (b) model of T junction; and (c) model connected to transmission lines.
Figure 9.21 A compensated form of T junction.
Figure 9.22 The asymmetric cross-over junction: (a) structure; and (b) equivalent circuit.
Figure 9.23 Magnitude of the current densities on the strips of a symmetrical cross-over junction: (a) normalized scale; (b) current on the top metal; and (c) current on the lower metal layer (between the top metal and the ground plane.
Figure 9.24 Instantaneous current and charges on the strips of a symmetrical cross-over junction: (a) normalized current scale; (b) normalized charge scale; (c) current on the top metal; (d) charge on the top metal; (e) current on the lower metal; and (f) charge on the lower metal.
Figure 9.25 Open-circuit normalized equivalent end-effect length () as a function of frequency. The data refer to a mm thick alumina substrate with , except for one case where the values were mm and , as indicated. Adapted from James and Henderson (1979) [25], Figure 10, p. 214. Reprinted with permission of IET.
Figure 9.26 Radiation conductance and normalized capacitance of an open-circuited microstrip line as functions of frequency (= 9.6, = 1, = 0.6 mm). Adapted from Katehi and Alexopoulos (1985) [27], Figure 4, p. 1032. Reprinted with permission of IEEE.
Figure 9.27 Gap-discontinuity radiation conductances
and
, and normalized capacitances
and
as functions of frequency (
= 9.6,
= 1,
= 0.6 mm,
= 0.3762). Adapted from Katehi and Alexopoulos (1985) [27], figure 7, p. 1032. Reprinted with permission of IEEE.
Figure 9.28 Open-circuit normalized excess length and normalized capacitances as functions of frequency (
= 9.6,
= 1,
= 0.6 mm). Adapted from Katehi and Alexopoulos (1985) [28], figure 8, p. 1033. Reprinted with permission of IEEE.
Figure 9.29 Gap-discontinuity normalized capacitances and as functions of frequency (= 9.6, = 1, = 0.6 mm, = 0.3762). Adapted from Katehi and Alexopoulos (1985) [27], Figure 9, p. 1033. Reprinted with permission of IEEE.
Figure 9.30 Right-angled single bend: (a) direct (i.e., unmitered); (b) mitered; and (c) double-mitered. The phase reference point is chosen at the center of the straight bend.
Figure 9.31 Magnitude of parameters of a right-angle crossing junction ( = 10.2, = 0.635 mm, = 0.61 mm). Adapted from Wu
et al.
(1990) [36], Figure 8, p. 1841. Reprinted with permission of IEEE.
Figure 9.32 Variations in of a right-angle bend for cut ratio (degree of miter) = 0, 0.5, 0.8, 1.2. mm, = 0.65 mm, = 2.53. Adapted from Chang
et al.
(1989) [37], Figure 3, p. 977. Reprinted with permission of the European Microwave Association.
Figure 9.33 Lumped equivalent model for cross-junction discontinuity.
Figure 9.34 The radial microstrip bend: (a) physical; (b) equivalent lumped model; and (c) waveguide model.
Figure 9.35 Return loss for 50 , bends with on MIC (0.635 mm thick alumina) and MMIC (0.1 mm thick GaAs) substrates. Adapted from Weisshaar
et al.
(1990) [39], Figure 2, p. 1054. Reprinted with permission of IEEE.
Figure 9.36 Normalized radiation loss for 50 bends with on MIC (0.635 mm thick alumina) and MMIC (0.1 mm thick GaAs) substrates. Adapted from Weisshaar
et al.
(1990) [39], Figure 4, p. 1054. Reprinted with permission of IEEE.
Figure 9.37 Rounding and tapering techniques that may be applied to reduce the discontinuity effects associated with: (a) bends; (b) T junctions; and (c) step in width.
Chapter 10: Parallel-coupled Microstrip Lines
Figure 10.1 A pair of parallel, edge-coupled microstrip lines.
Figure 10.2 Coupled microstrip lines in perspective.
Figure 10.3 Two parallel-coupled transmission lines.
Figure 10.4 Parallel-coupled coaxial lines: (a) showing fields; (b) even mode; and (c) odd mode. For simplicity only the electric field is indicated in (b) and (c).
Figure 10.5 Terminated coupled-line configuration.
Figure 10.6 Even and odd mode coupled-line representations: (a) even mode; and (b) odd mode.
Figure 10.7 Cross-section of three-line structure with four conductors.
Figure 10.8 Combinations of conductors leading to various capacitance measurements.
Figure 10.9 Field distributions resulting from (a) even-mode and (b) odd-mode excitation of parallel-coupled microstrip lines.
Figure 10.10 Cross-sectional dimensions: nomenclature.
Figure 10.11 Numerical results for the even- and odd-mode characteristic impedances of parallel-coupled microstrip lines: (a) ; and (b) . Adapted from Bryant and Weiss (1968) [3], Figure 6,7, p. 1025. Reprinted with permission of IEEE.
Figure 10.12 Normalized even-mode and odd-mode characteristic impedances of a pair of coupled microstrip lines.
Figure 10.13 Normalized characteristic impedance and normalized effective permittivity of a microstrip line as a function of . The effective permittivity of an individual microstrip line with the same width is .
Figure 10.14 Normalized even-mode and odd-mode effective permittivity of a pair of coupled microstrip lines. These results are for all .
Figure 10.15 Normalized even-mode and odd-mode effective permittivity of a pair of coupled microstrip lines for extremes of . Each family of three curves (almost on top of each other) is for = 4, 10, and 20. is the characteristic impedance of an individual microstrip line with the same normalized width .
Figure 10.16 Normalized even-mode and odd-mode effective permittivity of a pair of coupled microstrip lines with normalized width as a function of normalized gap spacing .
Figure 10.17 Separation of capacitances for use in the analysis: (a) even-mode capacitances; and (b) odd-mode capacitances.
Figure 10.18 “General” curves for use in the synthesis technique. is the aspect ratio () from a single microstrip line design procedure. Adapted from Akhtarzad
et al.
(1975) [15], Figure 3, p. 487. Reprinted with permission of IEEE.
Chapter 11: Applications of Parallel-coupled Microstrip Lines
Figure 11.1 Directional couplers: (a) schematic; and (b) backward-coupled microstrip.
Figure 11.2 Illustration of the defining parameters for coupled transmission lines: , coupling factor; , transmission factor; and , directivity factor.
Figure 11.3 Graphical design procedure yielding the shape ratios for a 10 dB microstrip directional coupler.
Figure 11.4 Parallel-coupled microstrips with the substrate (a) present and (b) absent (only the odd mode is indicated).
Figure 11.5 Final numerical dimensional values for the 10 dB coupler design shown in the text.
Figure 11.6 The characteristic shape of the frequency response for a loosely coupled ideal matched coupler.
Figure 11.7 A four-finger Lange coupler: (a) microstrip layout; and (b) circuit symbol.
Figure 11.8 The “unfolded” Lange coupler.
Figure 11.9 Parallel-coupled microstrips with a grounded shielding top plate.
Figure 11.10 Parallel-coupled microstrips with overlaid dielectric compensation. The substrate and overlay have the same permittivity.
Figure 11.11 Schematic illustration of parallel-coupled lines with lumped capacitors bridging the ends to provide compensation: (a) coupled lines; and (b) coupled lines with capacitors.
Figure 11.12 Schematic diagram of a quadruplexer using four 3 dB hybrids.
Figure 11.13 A plan schematic view of a single section semi-re-entrant coupler.
Figure 11.14 A cross-sectional view of a semi-re-entrant coupled section.
Figure 11.15 The plan-schematic view of a five-section directional coupler.
Figure 11.16 Microstrip re-entrant mode coupler cross-section.
Figure 11.17 Geometry of a microstrip patch coupler.
Figure 11.18 The general layout of a planar combline directional coupler.
Chapter 12: Microstrip Passive Elements
Figure 12.1 Segment of a 15 GHz microstrip circuit showing passive elements including stubs, bends, surface-mount resistors, transistor, capacitors, and inductor.
Figure 12.2 Lumped capacitors for microstrip circuits: (a) gap capacitor; (b) extended gap capacitor; (c) interdigitated capacitor; (d) another interdigitated capacitor; and (e) surface-mount chip capacitor.
Figure 12.3 A spiral inductor: (a) plan view; and (b) side view.
Figure 12.4 A microstrip torroidal inductor fabricated on a silicon circuit board: (a) layout view; and (b) response. From Liu
et al
. (2004) [8], Figure 6, 8, p. 649, 652. Used with permission of IEEE.
Figure 12.5 A microstrip solenoidal inductor fabricated on a silicon circuit board: (a) layout of a three-turn inductor; and (b) measured response of a three-turn inductor (the thin lines are the simulated responses). Adapted from Feng
et al
. (2007) [9], Figure 6, p. 1907. Reprinted with permission of IEEE.
Figure 12.6 A microstrip solenoidal transformer fabricated on a silicon circuit board: (a) layout of a three-turn inductor; (b) transformer circuit element showing the orientation of the winding connections; and (c) measured response of a four-turn transformer.
Figure 12.7 Network and microstrip circuit layout for a -type attenuator: (a) circuit topology; and (b) microstrip circuit with open-circuited stubs.
Figure 12.8 Various representations of an open-circuit microstrip stub: (a) longitudinal section; (b) layout view; transmission line model; (d) compact transmission line model; (e) alternative compact transmission line; and (f) shunt stub.
Figure 12.9 Various representations of a short-circuit microstrip stub: (a) longitudinal section; (b) layout view; transmission line model; (d) compact transmission line model; and (e) shunt stub.
Figure 12.10 Microstrip radial stubs: (a) series connected; (b) shunt connected; and (c) butterfly structure.
Figure 12.11 parameters of the radial stub. Alumina substrate, = 9.768 (measured), height mm, width mm, gap = 0.61 mm, radius = 3.253 mm: (a) and (b) . Adapted from Rittweger and Wolff (1990) [21], Figure 1, p. 1149. Reprinted with permission of IEEE.
Figure 12.12 Ring form of microstrip 3 dB branch-line directional coupler.
Figure 12.13 Balanced mixer circuit based on the structure of Figure 12.12: (a) schematic layout; and (b) microstrip circuit with surface-mount diodes.
Figure 12.14 Two-branch coupler with two-fold symmetry (= line lengths, = characteristic impedances). Adapted from Mayer and Knochel (1990) [22], Figure 1, p. 393. Reprinted with permission of IEEE.
Figure 12.15 Extended two-branch coupler with open stubs at the symmetry planes. Adapted from Mayer and Knochel (1990) [22], Figure 2, p. 393. Reprinted with permission of IEEE.
Figure 12.16 Broadbanded 0/180 coupler. Adapted from Knochel and Mayer (1990) [23], Figure 6, p. 473. Reprinted with permission of IEEE.
Figure 12.17 Conventional and port-interchanged rat-race hybrids: (a) circuit diagram of a conventional rat-race hybrid; (b) circuit diagram of a port-interchanged rat-race hybrid. Adapted from Nakamoto
et al
. (1989) [27], Figure 1, p. 314. Reprinted with permission of the European Microwave Association.
Figure 12.18 Rat-race or hybrid-ring coupler.
Figure 12.19 Wilkinson combiner: (a) circuit schematic; and (b) microstrip implementation.
Figure 12.20 Chireix combiner.
Figure 12.21 Branch-line directional coupler in MIC form: (a) microstrip layout; (b) odd-mode equivalent circuit; and (c) even-mode equivalent circuit.
Figure 12.22 Circuit construction and cross-sectional views of baluns: (a) circuit construction of monolithic or hybrid balun; and (b) typical balun structure cross-section. Adapted from Pavio and Kikel (1990) [40], Figure 2 and 3, p. 484. Reprinted with permission of IEEE.
Figure 12.23 Planar baluns: circuit cell and cross-sections: (a) planar balun circuit cell; and (b) cross-section of a circuit cell. Adapted from Barber (1990) [41], Figure 1 and 2, p. 496. Reprinted with permission of IEEE.
Chapter 13: Stripline Design
Figure 13.1 Stripline circuit: (a) symmetrical stripline; and (b) asymmetrical stripline; (c) stripline cross-over.
Figure 13.2 Symmetrical stripline circuit (3D view).
Figure 13.3 Fringe capacitance at the corners of the strip in stripline transmission lines.
Figure 13.4 High- suspended stripline, the strip is supported by a membrane.
Figure 13.5 Cross-section of an asymmetrical stripline.
Figure 13.6 Edge-coupled striplines: (a) cross section; and (b) nomenclature.
Figure 13.7 Broadside-coupled striplines: (a) thick strips; and (b) nomenclature.
Figure 13.8 Doubled-sided parallel stripline: (a) aligned; and (b) offset.
Figure 13.9 Cross-section of an asymmetrical stripline.
Figure 13.10 Right-angled stripline bend: (a) structure and nomenclature; and (b) equivalent circuit.
Figure 13.11 Striplines with ground-plane vias.
Chapter 14: CPW Design Fundamentals
Figure 14.1 Structure of (a) slotline; and (b) differential line or CPS.
Figure 14.2 Structure of a CPW: (a) conventional; and (b) FGCPW.
Figure 14.3 Instantaneous normalized current magnitude and charge distribution along a CPW line along with respective normalized scales: (a) longitudinal current; (b) transverse current; and (c) charge. The current and charge are normalized and use the scale shown on the left-hand side. The maximum of the transverse current is 500 times smaller than that of the longitudinal current. (The line is 1 mm long, the frequency is 100 GHz, m, and m).
Figure 14.4 Expanded view, current magnitude, and charge distribution along a CPW line: (a) longitudinal current; (b) transverse current; and (c) charge.
Figure 14.5 Asymmetric CPW.
Figure 14.6 CPW with an intervening layer. HR, high resistivity.
Figure 14.7 Dispersion in a 39 CPW on alumina ( = 9.5, = 0.635 mm).
Figure 14.9 Dispersion in a 70 CPW on alumina ( = 9.5, = 0.635 mm).
Figure 14.10 Dispersion of CPW on GaAs with no backing: (a) effective permittivity; and (b) characteristic impedance.
Figure 14.11 Dispersion of CPW on GaAs ignoring dielectric and metallic losses.
Figure 14.12 CPW on GaAs with lossy gold metallization and ignoring dielectric losses, showing real and .
Figure 14.13 CPW on lossy GaAs with 3 m of covering polyimide.
Figure 14.14 CPW on GaAs: variation of parameters with .
Figure 14.15 CPW on GaAs: variation of parameters with coplanar ground plane width .
Figure 14.16 CPW on standard silicon with loss included.
Figure 14.17 50 CPW on alumina: frequency-dependent behavior.
Figure 14.18 50 CPW on alumina: parameter variations with separation (at 30 GHz, small ).
Figure 14.19 50 CPW on alumina: parameter variations with separation (at 30 GHz, large ).
Figure 14.20 Patterned backside metallization suppressing unwanted surface or parallel-plate modes. Adapted from Hesselbarth and Vahldieck (1999) [20], Figure 4. p. 873. Reprinted with permission of IEEE.
Figure 14.21 Step changes in (a) ground plane separation; (b) center conductor width; and (c) equivalent circuit.
Figure 14.22 Normalized current distribution on the conductors of a CPW impedance step realized using a step of the width of the internal conductor: (a) normalized scale; (b) magnitude of the longitudinal current; and (c) magnitude of the transverse current (frequency is 30 GHz).
Figure 14.23 Normalized current distribution on the conductors of a CPW impedance step realized using a step of the conductor separation: (a) normalized scale; (b) magnitude of the longitudinal current; and (c) magnitude of the transverse current (frequency is 30 GHz).
Figure 14.24 Estimates of the capacitance associated with step changes in width.
Figure 14.25 Step capacitance versus width/gap ratio for two substrates.
Figure 14.26 Quasi-open circuit (a) and alternative equivalent circuits (b).
Figure 14.27 Symmetric series gap layout and capacitive equivalent circuit indicating reference planes 1 and 2.
Figure 14.28 Pseudo short circuit: (a) layout; and (b) cross-section.
Figure 14.29 Pseudo short circuit: (a) layout and (b) alternative equivalent circuits.
Figure 14.30 Normalized magnitude of the current distribution on the conductors of a CPW pseudo short circuit: (a) scale; (b) short at 100 GHz showing standing wave pattern of longitudinal current; (c) magnitude of the longitudinal current at 30 GHz in greater detail; and (d) magnitude of the transverse current at 30 GHz.
Figure 14.31 Right-angle bend: (a) layout; and (b) equivalent circuit.
Figure 14.32 Right-angle bend inductance as a function of parameter .
Figure 14.33 T junction: (a) layout; and (b) lumped equivalent circuit.
Figure 14.34 T-junction transformer ratio as a function of frequency.
Figure 14.35 The T junction (a) structure analyzed by Mirshekar-Syahkal [37] together with its equivalent circuit (b). Dimensions are m, substrate height m, m, m, air bridge height = m, and m. Adapted from Mirshekar-Syahkal (1996) [37], Figure 4, p. 982. Reprinted with permission of IEEE.
Figure 14.36 Effects of the coupled slotline mode on air bridges. Adapted from Sewell and Rozzi (1994) [38], Figure 14, p. 2086. Reprinted with permission of IEEE.
Figure 14.37 SEM micrographs of CPW cross-over junctions: (a) conventional CPW; and (b) FGCPW. The lines have the same dimensions. Adapted from Ponchak and Tentzeris (2000) [41], Figure 1 and 2, p. 1892. Reprinted with permission of IEEE.
Figure 14.38 (a) Interdigital or stub structure; and (b) its equivalent circuit. The reference planes are denoted by T and T.
Figure 14.39 Through-connected interdigital stub: (a) structure; and (b) its equivalent circuit. The reference planes are denoted by T and T.
Figure 14.40 Layout of a 30% bandwidth bandpass filter on an alumina substrate.
Figure 14.41 Transmission response () of the bandpass filter.
Figure 14.42 Return loss () of the bandpass filter.
Figure 14.43 Basic structure of an MMIC-implemented bandpass filter. Adapted from Mernyei
et al.
(1994) [45], Figure 2, p. 1862. Reprinted with permission of IEEE.
Figure 14.44 Two-section in-phase CPW power divider. Adapted from Fan and Chang (1996) [51], Figure 8, p. 2415. Reprinted with permission of IEEE.
Figure 14.45 Energy leakage due to the various modes occurring in flip-chip structures: (a) modes; and (b) detail. Adapted from Lee and Lee (1998) [52], Figure 1. p. 366. Reprinted with permission of IEEE.
Figure 14.46 CPW with top and bottom metal shields.
Figure 14.47 Cross-sections: (a) conventional CPW; and (b) “inverted-V” CPW.
Figure 14.48 A 3D multilayer stack of FGCPW structures. Adapted from Herrick
et al.
(1999) [60], Figure 1. p. 61. Reprinted with permission of IEEE.
Figure 14.49 Trenched CPW on an HRS substrate: (a) plan view; and (b) cross-section.
Figure 14.50 CPS or differential line structures on (a) the surface of a dielectric or (b) embedded.
Figure 14.51 Instantaneous normalized current magnitude and charge distribution along a differential line: (a) longitudinal current; (b) transverse current; and (c) charge. The current and charge are normalized and use the scales shown on the left-hand side. The peak transverse current is 1500 times smaller than the peak of the longitudinal current. The frequency is 10 GHz, = 2.5 m, and m.
Figure 14.52 Characteristic impedance and effective relative permittivity of open differential line fabricated on HRS ( = 11.9) for various ratios. Frequency = 10 GHz, height above ground plane, = 650 m.
Figure 14.53 Frequency dependence of characteristic impedance and effective relative permittivity of open differential line fabricated on HRS ( = 11.9). Height above ground plane, = 650 m.
Figure 14.54 Characteristic impedance and effective relative dielectric constant of an embedded differential line fabricated in LTCC with = 7.3 for various ratios. Frequency = 10 GHz, height from the line to each ground plane, = 340 m. Results derived using SONNET simulations.
Figure 14.55 Characteristic impedance of an embedded differential line fabricated in LTCC with = 7.3 for various ratios. Frequency = 2.45 GHz, separation, = 100 m, and width, = 70 m. Results derived using SONNET simulations.
Chapter 15: Slotline
Figure 15.1 Slotline. Adapted from Cohn (1969) [1], Figure 1, p. 1149. Reprinted with permission of IEEE.
Figure 15.2 Slotline field distribution: (a) slotline transverse and fields; (b) longitudinal cross-section showing the -field pattern; and (c) top elevation view showing the current, , and the -field pattern. Adapted from Cohn (1969) [1], Figure 2, p. 769. Reprinted with permission of IEEE.
Figure 15.3 3D representation of slotline. Adapted from Robinson and Allen (1969) [13], Figure 1, p. 1097. Reprinted with permission of IEEE.
Figure 15.4 Electric and magnetic field distributions for higher-order modes in slotline: (a) dominant slotline mode, the
e
01
mode; (b) the
e
11
mode; (c) the
e
01
mode; (d) the
o
11
mode; and (e) the
o
02
mode. The
e
indicates an even mode while an
o
indicates an odd mode. Adapted from Citerne
et al
. (1975) [14], Figure 1, p. 1097. Reprinted with permission of the European Microwave Association.
Figure 15.5 Measured phase coefficient () versus frequency for slotline and microstrip. Adapted from Robinson and Allen (1969) [13], Figure 3, p. 1098. Reprinted with permission of IEEE.
Figure 15.6 Slotline dispersion characteristics. (Here is the free space wavelength). Adapted from Knorr and Kuchler (1975) [15], Figure 2, p. 543. Reprinted with permission of IEEE.
Figure 15.7 Dispersion characteristics of slotlines computed using Svacina's analysis [16] and Cohn's analysis [1]. Substrate permittivity . Adapted from Svacina (1999) [16], Figure 3, p. 1828. Reprinted with permission of IEEE.
Figure 15.8 Normalized phase coefficient for the dominant and first higher-order mode in slotline: , mm, mm, . Adapted from Kitazawa
et al
. (1980) [17], Figure 3, p. 391. Reprinted with permission of IEEE.
Figure 15.9 Normalized phase coefficient for slotlines having thickness-width ratios ranging from zero (0.00) to 0.1. Adapted from Kitazawa
et al
. (1980) [17], Figure 4, p. 391. Reprinted with permission of IEEE.
Figure 15.10 Characteristic impedance of a slotline. Adapted from Knorr and Kuchler (1975) [15], Figure 3, p. 544. Reprinted with permission of IEEE.
Figure 15.11 Characteristic impedance for slotlines having thickness-width ratios ranging from zero (0.00) to 0.1. Adapted from Kitazawa
et al
. (1980) [17], Figure 5, p. 391. Reprinted with permission of IEEE.
Figure 15.12 Losses in microstrip and slotline () compared. The points are measured loss of slotline. Adapted from Robinson and Allen
et al
. (1969) [13], Figure 5, p. 1098. Reprinted with permission of IEEE.
Figure 15.13 Slotline: threshold for the onset of dielectric leakage. Substrate thickness versus frequency with . Adapted from Rozzi
et al
. (1990) [19], Figure 5, p. 1071. Reprinted with permission of IEEE.
Figure 15.14 Conductor and dielectric losses in slotline as functions of the double-width for 2, 7, 12, 18, 24, and 30 GHz; losses increase with frequency. Adapted from Rozzi
et al
. (1990) [19], Figure 9, p. 1075. Reprinted with permission of IEEE.
Figure 15.15 Dielectric and ground plane losses in slotline as a function of dielectric loss tangent (curves (b) and (d)) and as a function of ground plane conductivity normalized to that of copper (curves (c) and (e)). Curves (b)–(e) use the analysis of Das and Pozar. Curves (a) and (f) use a perturbation analysis with low loss substrate and ground plane. The frequency is 3 GHz, the substrate has a thickness of 1.6 mm and permittivity of 2.2, and the line width is 5 mm. Adapted from Das and Pozar (1991) [20], Figure 8, p. 60. Reprinted with permission of IEEE.
Figure 15.16 Slotline losses as a function of slot width. Each curve was calculated using a different method with (b) considered to be more accurate. Adapted from Das and Pozar (1991) [20], Figure 10, p. 61. Reprinted with permission of IEEE.
Figure 15.17 An assortment of planar transmission line structures. Adapted from Jansen
et al
. (1981) [21], Figure 1, p. 77. Reprinted with permission of the Institution of Engineering and Technology.
Figure 15.18 Shorted slot end-effect data in comparison with the measured results of Knorr and Saenz. mm, , , , , , . Adapted from Jansen
et al
. (1981) [21], Figure 7, p. 83. Reprinted with permission of the Institution of Engineering and Technology.
Figure 15.19 Equivalent end-effect length applying to a single short-circuited slotline on an alumina substrate. mm, , , , , . Adapted from Jansen
et al
. (1981) [21], Figure 8, p. 84. Reprinted with permission of the Institution of Engineering and Technology.
Figure 15.20 A family of short circuit reactance curves derived for . , , . Adapted from Knorr and Salenz (1973) [22], Figure 4, p. 580. Reprinted with permission of IEEE.
Figure 15.21 End effect of a shorted pair of coupled slotlines in odd mode. mm, , , , , . Adapted from Jansen
et al
. (1981) [21], Figure 8, p. 84. Reprinted with permission of the Institution of Engineering and Technology.
Figure 15.22 End effect of a shorted pair of coupled slotlines in even mode. Parameters not specified are as in Figure 15.21. Adapted from Jansen
et al
. (1981) [21], Figure 8, p. 84. Reprinted with permission of the Institution of Engineering and Technology.
Figure 15.23 Experimental setup: (a)–(d) slotline test patterns; and (e) apparatus. Adapted from Chramiec (1989) [23], Figure 1 and 2, p. 1639. Reprinted with permission of IEEE.
Figure 15.24 Measured reactances of slotline short end on an alumina substrate. Adapted from Chramiec (1989) [23], Figure 3, p. 1639. Reprinted with permission of IEEE.
Figure 15.25 Measured reactance of the slotline nonuniform resonator of Figure 15.23(d). Adapted from Chramiec (1989) [23], Figure 6, p. 1640. Reprinted with permission of IEEE.
Chapter 16: Slotline Applications
Figure 16.1 Schematic diagram of a symmetrical eight-port circuit. The solid lines represent microstrip lines on the top of the circuit. The dashed lines represent slotlines in the ground plane on the bottom of the circuit board. Adapted from Riblet (1990) [1], Figure 1, p. 1421. Used with permission of IEEE.
Figure 16.2 Version 1 of the planar microstrip-slotline symmetrical comparator. The circumference is three wavelengths at midband. Adapted from Riblet (1990) [1], Figure 2, p. 1423. Reprinted with permission of IEEE.
Figure 16.3 Schematic diagram of a two-port circuit which may be used to determine the theoretical performance of the eight-port circuit in Figure 16.2. Optimum performance is obtained if . Adapted from Riblet (1990) [1], Figure 3, p. 1423. Reprinted with permission of IEEE.
Figure 16.4 Optimum return loss versus normalized frequency for Version I (Figure 16.2) and Version II (Figure 16.5). Adapted from Riblet (1990) [1], Figure 4, p. 1423. Reprinted with permission of IEEE.
Figure 16.5 Version II of the planar microstrip-slotline symmetrical comparator. The circumference is only a wavelength at midband. Adapted from Riblet (1990) [1], Figure 5, p. 1423. Reprinted with permission of IEEE.
Figure 16.6 Even- and odd-mode characteristic impedance of coupled slotlines with and . Adapted from Knorr and Kuchler (1975) [2], Figure 6, p. 544. Reprinted with permission of IEEE.
Figure 16.7 Even- and odd-mode dispersion characteristics of coupled slotlines with and . Adapted from Knorr and Kuchler (1975)[2], Figure 6, p. 544. Reprinted with permission of IEEE.
Figure 16.8 Layout of a wideband coupler, including microstrip ports. Adapted from Abbosh and Bialkowski (2007) [3], Figure 1, p. 190. Reprinted with permission of IEEE.
Figure 16.9 Equivalent configuration used to determine the initial dimensions. Adapted from Abbosh and Bialkowski (2007) [3], Figure 1, p. 190. Reprinted with permission of IEEE.
Figure 16.10 Resonator configurations for slotline bandpass filters: (a) quarter-wave-coupled resonant slots; and (b) end-coupled resonant slots. Adapted from Mariani and Agrios (1970) [4], Figure 1, p. 1090. Reprinted with permission of IEEE.
Figure 16.11 Filter applications: (a) bandstop filter using cascaded resonant slots; and (b) parallel-coupled slotline bandpass filter. Adapted from Cohn (1969) [5], Figure 6, p. 770. Reprinted with permission of IEEE.
Figure 16.12 Basic design concept of a magic T. Adapted from Aikawa and Ogawa (1989) [6], Figure 4, p. 408. Reprinted with permission of IEEE.
Figure 16.13 Planar magic Ts. Adapted from Aikawa and Ogawa (1980) [7], Figure 4, p. 408. Reprinted with permission of IEEE.
Figure 16.14 Schematic behaviors for in-phase and out-of-phase couplings: (a) in-phase coupling (odd mode in the coupled slotlines); and (b) out-of-phase coupling (even-mode in the coupled slotlines). Adapted from Aikawa and Ogawa (1980) [7], Figure 2, p. 524. Reprinted with permission of IEEE.
Figure 16.15 Schematic and equivalent circuit of microstrip type magic T. Adapted from Aikawa and Ogawa (1980) [7], Figure 3, p. 525. Reprinted with permission of IEEE.
Figure 16.16 Obtainable isolation and return loss at the average center frequency, where is . Note that is the normalized length deviation. . Adapted from Aikawa and Ogawa (1980) [7], Figure 7, p. 527. Reprinted with permission of IEEE.
Figure 16.17 Circuit configuration of the conventional Marchand balun.
Figure 16.18 Slotline Marchand balun: (a) Marchand balun using slot-coupled microstrip lines, and its (b) A-A and (c) B-B cross-sectional views; and (d) the equivalent structure of the diamond-shape slot-coupled microstrip line. Adapted from Tseng and Hsiao (2010) [8], Figure 2, p. 157. Reprinted with permission of IEEE.
Figure 16.19 Even-mode and odd-mode impedances versus the slot and strip widths. Adapted from Tseng and Hsiao (2010) [8], Figure 3, p. 158. Reprinted with permission of IEEE.
Figure 16.20 Circuit photographs of (a) top and (b) bottom views of the slotline Marchand balun. Adapted from Tseng and Hsiao (2010) [8], Figure 4, p. 158. Reprinted with permission of IEEE.
Figure 16.21 parameters for the slotline Marchand balun. Adapted from Tseng and Hsiao (2010) [8], Figure 5, p. 159. Reprinted with permission of IEEE.
Figure 16.22 Geometry of a multilayer microstrip-slotline. Adapted from El-Sharawy and Jackson (1990) [9], Figure 5, p. 280. Reprinted with permission of IEEE.
Figure 16.23 Effect of microstrip-slot dimensions on differential phase shift in the multilayer structure of Figure 16.22. Adapted from El-Sharawy and Jackson (1990) [9], Figure 6, p. 280. Reprinted with permission of IEEE.
Figure 16.24 Geometry of structure (derived from that of Figure 16.22) with an additional top layer of low-dielectric material. Adapted from El-Sharawy and Jackson (1990) [9], Figure 9, p. 281. Reprinted with permission of IEEE.
Figure 16.25 Physical configurations of slot-guide Y circulators: (a) common top view; (b) stack without metal cap; (c) stack with metallic foil as a cap; and (d) ferrite substrate on its own. Adapted from Ogasawara and Kaji (1971) [10], Figure 2, p. 220. Reprinted with permission of the Institution of Engineering and Technology.
Figure 16.26 Insertion loss and isolation versus DC magnetic field as measured on the experimental coplanar-guide Y circulator illustrated in Figure 16.25(d). Adapted from Ogasawara and Kaji (1971) [10], Figure 3, p. 221. Reprinted with permission of the Institution of Engineering and Technology.
Figure 16.27 Enclosed slotline circulator: (a) structure of the device; and (b) distribution of energy in the ferrite slab. Adapted from Courtois and de Vecchis (1975) [11], Figure 1, p. 512. Reprinted with permission of IEEE.
Figure 16.28 Double-sided balanced microwave circuit with a PSK modulator, phase detector, and mixer. Adapted from Aikawa and Ogawa (1989) [6], Figure 15, p. 411. Reprinted with permission of IEEE.
Chapter 17: Transitions
Figure 17.1 Compensated coaxial-microstrip transition (all dimensions in millimeters): (a) plan view; and (b) longitudinal section. The width of the microstrip strip is and the thickness of the substrate = 0.5 mm. Adapted from England (1976) [2], Figure 1, p. 47. Reprinted with permission of IEEE.
Figure 17.2 Rectangular waveguide-to-microstrip transition using a ridgeline transformer for the 27.5–31.3 GHz band: (a) complete mechanical structure; and (b) ridgeline transformer dimensions (all in millimeters). Adapted from Schneider
et al
. (1969) [3], Figure 5, p. 1717. Reprinted with permission of the American Telephone and Telegraph Company.
Figure 17.3 Microstrip transitions: (a) photograph of a 15 GHz microstrip-to-waveguide transition; (b) cross-section of structure in (a); and (c) alternative microstrip to waveguide transition using a ridge. Figure (c) adapted from Menzel and Klaassen (1989) (1989) [6], Figure 1, p. 1265. Reproduced with the permission of the European Microwave Association.
Figure 17.4 Waveguide-to-microstrip transition using tapers and a balun: (a) waveguide-end view; and (b) longitudinal view. Adapted from van Heuven (1976) [7], Figure 1 and 2, p. 145. Reproduced with permission of IEEE.
