FPGA Prototyping by Verilog Examples E-Book

Pong P. Chu

• Herausgeber: John Wiley & Sons
• Kategorie: Wissenschaft und neue Technologien
• Sprache: Englisch

Seitenzahl: 497

Veröffentlichungsjahr: 2011

Beschreibung

FPGA Prototyping Using Verilog Examples will provide you with a hands-on introduction to Verilog synthesis and FPGA programming through a "learn by doing" approach. By following the clear, easy-to-understand templates for code development and the numerous practical examples, you can quickly develop and simulate a sophisticated digital circuit, realize it on a prototyping device, and verify the operation of its physical implementation. This introductory text that will provide you with a solid foundation, instill confidence with rigorous examples for complex systems and prepare you for future development tasks.

Leseprobe

CONTENTS

Preface

Acknowledgments

PART I BASIC DIGITAL CIRCUITS

1 Gate-level combinational circuit

1.1 Introduction

1.2 General description

1.3 Basic lexical elements and data types

1.4 Data types

1.5 Program skeleton

1.6 Structural description

1.7 Testbench

1.8 Bibliographic notes

1.9 Suggested experiments

2 Overview of FPGA and EDA software

2.1 Introduction

2.2 FPGA

2.3 Overview of the Digilent S3 board

2.4 Development flow

2.5 Overview of the Xilinx ISE project navigator

2.6 Short tutorial on ISE project navigator

2.7 Short tutorial on the ModelSim HDL simulator

2.8 Bibliographic notes

2.9 Suggested experiments

3 RT-level combinational circuit

3.1 Introduction

3.2 Operators

3.3 Always block for a combinational circuit

3.4 If statement

3.5 Case statement

3.6 Routing structure of conditional control constructs

3.7 General coding guidelines for an always block

3.8 Parameter and constant

3.9 Design examples

3.10 Bibliographic notes

3.11 Suggested experiments

4 Regular Sequential Circuit

4.1 Introduction

4.2 HDL code of the FF and register

4.3 Simple design examples

4.4 Testbench for sequential circuits

4.5 Case study

4.6 Bibliographic notes

4.7 Suggested experiments

5 FSM

5.1 Introduction

5.2 FSM code development

5.3 Design examples

5.4 Bibliographic notes

5.5 Suggested experiments

6 FSMD

6.1 Introduction

6.2 Code development of an FSMD

6.3 Design examples

6.4 Bibliographic notes

6.5 Suggested experiments

7 Selected Topics of Verilog

7.1 Blocking versus nonblocking assignment

7.2 Alternative coding style for sequential circuit

7.3 Use of the signed data type

7.4 Use of function in synthesis

7.5 Additional constructs for testbench development

7.6 Bibliographic notes

7.7 Suggested experiments

PART II I/O MODULES

8 UART

8.1 Introduction

8.2 UART receiving subsystem

8.3 UART transmitting subsystem

8.4 Overall UART system

8.5 Customizing a UART

8.6 Bibliographic notes

8.7 Suggested experiments

9 PS2 Keyboard

9.1 Introduction

9.2 PS2 receiving subsystem

9.3 PS2 keyboard scan code

9.4 PS2 keyboard interface circuit

9.5 Bibliographic notes

9.6 Suggested experiments

10 PS2 Mouse

10.1 Introduction

10.2 PS2 mouse protocol

10.3 PS2 transmitting subsystem

10.4 Bidirectional PS2 interface

10.5 PS2 mouse interface

10.6 Bibliographic notes

10.7 Suggested experiments

11 External SRAM

11.1 Introduction

11.2 Specification of the IS61LV25616AL SRAM

11.3 Basic memory controller

11.4 A safe design

11.5 More aggressive design

11.6 Bibliographic notes

11.7 Suggested experiments

12 Xilinx Spartan-3 Specific Memory

12.1 Introduction

12.2 Embedded memory of Spartan-3 device

12.3 Method to incorporate memory modules

12.4 HDL templates for memory inference

12.5 Bibliographic notes

12.6 Suggested experiments

13 VGA controller I: graphic

13.1 Introduction

13.2 VGA synchronization

13.3 Overview of the pixel generation circuit

13.4 Graphic generation with an object-mapped scheme

13.5 Graphic generation with a bit-mapped scheme

13.6 Bibliographic notes

13.7 Suggested experiments

14 VGA controller II: text

14.1 Introduction

14.2 Text generation

14.3 Full-screen text display

14.4 The complete pong game

14.5 Bibliographic notes

14.6 Suggested experiments

PART III PICOBLAZE MICROCONTROLLER XILINX SPECIFIC

15 PicoBlaze Overview

15.1 Introduction

15.2 Customized hardware and customized software

15.3 Overview of PicoBlaze

15.4 Development flow

15.5 Instruction set

15.6 Assembler directives

15.7 Bibliographic notes

16 PicoBlaze Assembly Code Development

16.1 Introduction

16.2 Useful code segments

16.3 Subroutine development

16.4 Program development

16.5 Processing of the assembly code

16.6 Syntheses with PicoBlaze

16.7 Bibliographic notes

16.8 Suggested experiments

17 PicoBlaze I/O Interface

17.1 Introduction

17.2 Output port

17.3 Input port

17.4 Square program with a switch and seven-segment LED display interface

17.5 Square program with a combinational multiplier and UART console

17.6 Bibliographic notes

17.7 Suggested experiments

18 PicoBlaze Interrupt Interface

18.1 Introduction

18.2 Interrupt handling in PicoBlaze

18.3 External interface

18.4 Software development considerations

18.5 Design example

18.6 Bibliographic notes

18.7 Suggested experiments

Appendix A: Sample Verilog templates

A.1 Numbers and operators

A.2 General Verilog constructs

A.3 Routing with conditional operator and if and case statements

A.4 Combinational circuit using an always block

A.5 Memory Components

A.6 Regular sequential circuits

A.7 FSM

A.8 FSMD

A.9 S3 board constraint file (s3. ucf)

References

Topic Index

A JOHN WILEY & SONS, INC., PUBLICATION

Copyright © 2008 by John Wiley & Sons, Inc. All rights reserved.

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Library of Congress Cataloging-in-Publication Data:

Chu, Pong P., 1959–FPGA prototyping by Verilog examples / Pong P. Chu.p. cm.Includes index.ISBN 978-0-470-18532-2 (cloth)1. Field programmable gate arrays—Design and construction. 2. Prototypes, Engineering. 3.Verilog (Computer hardware description language) I. Title.TK7895.G36C484 2008621.39’5—dc22                                                  2008003732

In memory of my father, Chia Chi Chu

PREFACE

HDL (hardware description language) and FPGA (field-programmable gate array) devices allow designers to quickly develop and simulate a sophisticated digital circuit, realize it on a prototyping device, and verify operation of the physical implementation. As these technologies mature, they have become mainstream practice. We can now use a PC and an inexpensive FPGA prototyping board to construct a complex and sophisticated digital system. This book uses a “learning by doing” approach and illustrates the FPGA and HDL development and design process by a series of examples. A wide range of examples is included, from a simple gate-level circuit to an embedded system with an 8-bit soft-core microcontroller and customized I/O peripherals. All examples can be synthesized and physically tested on a prototyping board.

Focus and audience

Focus   The main focus of this book is on the effective derivation of hardware, not the syntax of HDL. Instead of explaining every language construct, the book focuses on a small synthesizable subset and uses about a dozen code templates to provide the skeletons of various types of circuits. These templates are general and can easily be integrated to construct a large, complex system. Although this approach limits the “freedom” of syntactic expression, it will not prevent us from developing innovative hardware architecture. Because of the generality and flexibility of HDL, the same circuit can usually be described by a wide variety of language constructs and coding styles. Many of these codes are intended for modeling. They may lead to unnecessarily complex hardware implementation and sometimes cannot be synthesized at all. The template approach actually forces us to think more about hardware and develop a good coding practice for synthesis. Since we are more interested in hardware, it is more beneficial to spend time on developing 10 different hardware architectures with the same code template rather than describing the same circuit with 10 different versions of codes.

There are two popular HDLs, VHDL and Verilog. Both languages are used widely and are IEEE standards. This book uses Verilog, and a separate book with a similar title uses VHDL. Despite the drastic syntactic differences in the two languages, their capabilities are very similar, particularly for our purposes. After we comprehend the design practice and coding methodology in one language, learning the other language is rather straightforward.

Although the book is intended for beginning designers, the examples follow strict design guidelines and prepare readers for future endeavors. The coding and design practice is “forward compatible,” which means that:

• The same practice can be applied to large design in the future.

• The same practice can aid other system development tasks, including simulation, timing analysis, verification, and testing.

• The same practice can be applied to ASIC technology and different types of FPGA devices.

• The code can be accepted by synthesis software from different vendors.

In summary, the book is a hands-on, hardware-centric text that involves minimal HDL overhead and follows good design and coding practice to achieve maximal forward comparability.

Audience and perquisites   The book contains three major parts: basic digital circuits, peripheral modules, and embedded microcontroller. The intended audience is students in an introductory or advanced digital system design course as well as practicing engineers who wish to learn FPGA- and HDL-based development. For the materials in the first two parts, readers need to have a basic knowledge of digital systems, usually a required course in electrical engineering and computer engineering curricula. For the materials in the third part, prior exposure to assembly language programming will be helpful.

Logistics

Although a major goal of this book is to teach readers to develop software-independent and device-neutral HDL codes, we have to choose a software package and a prototyping board to synthesize and implement the design examples. The synthesis software and FPGA devices from Xilinx, a leading manufacture in this area, are used in the book.

Software   The synthesis software used in the book is the Web version of the Xilinx ISE package. The functionality of this version is similar to that of the full version but supports only a limited number of devices. Most introductory development boards use FPGA devices from the inexpensive Spartan-3 family. Since the Web version supports the Spartan-3 device, it fits our needs. The simulation software used in the book is the starter version of Mentor Graphics’ ModelSim XE III package. It is a customized edition of ModelSim. Both software packages are free and can be downloaded from Xilinx’s Web site.

FPGA prototyping board   This book is prepared to be used with several entry-level FPGA prototyping boards manufactured by Digilent Inc., including the Spartan-3 Starter, Nexys-2, and Basys boards, all of which contain a Spartan-3/3E FPGA device and have similar I/O peripherals. The design examples in the book are based on the Spartan-3 Starter board (or simply the S3 board), but most of them can be used directly on other boards as well. The applicability of the HDL codes is summarized below.

• Spartan-3 Starter (S3) board. The S3 board contains all the peripherals and no additional accessory module is needed. All HDL codes and discussions can be applied to this board directly.

• Nexys-2 board. The Nexys-2 board is a newer board, which contains a larger FPGA device and a larger memory chip. Its peripherals are similar to those on the S3 board. There are two differences. First, the “color depth” of its VGA interface is expanded from 3 bits to 8 bits. Thus, the output of the VGA interface circuits discussed in Chapters 13 and 14 needs to be modified accordingly. Second, the Nexys-2 board contains a more sophisticated external memory device. Although the device can be configured as an asynchronous SRAM, the timing characteristics are different from those of the S3 board’s memory device, and thus the HDL codes for the memory controller in Chapter 11 cannot be used directly. However, the same design principle can be applied to construct a new controller.

• Basys board. The Basys board is a simpler board. It lacks the RS-232 connector. To implement the UART module and the serial interface discussed in Chapter 8, we need Digilent’s RS-232 converter peripheral module. The Basys board has no external memory devices, and thus the discussion of the memory controller in Chapter 11 is not applicable.

• Other FPGA boards. Most peripherals discussed in this book are de facto industrial standards, and the corresponding HDL codes can be used as long as a board provides proper analog interface circuits and connectors. Except for the Xilinx-specific portions, the codes can be applied to the boards based on the FPGA devices from other manufacturers as well.

PC Accessories   The design examples include interfaces to several PC peripheral devices. A keyboard, a mouse, and a VGA monitor are required for the respective modules, and a “straight-through” serial cable (the most commonly used type) is required for the UART module. These accessories are widely available and can probably be obtained from an old PC.

Book organization

The book is divided into three major parts. Part I introduces the elementary HDL constructs and their hardware counterparts, and demonstrates the construction of a basic digital circuit with these constructs. It consists of six chapters:

• Chapter 1 describes the skeleton of an HDL program, basic language syntax, and logical operators. Gate-level combinational circuits are derived with these language constructs.

• Chapter 2 provides an overview of an FPGA device, prototyping board, and development flow. The development process is demonstrated by a tutorial on Xilinx ISE synthesis software and a tutorial on Mentor Graphics ModelSim simulation software.

• Chapter 3 introduces HDL’s relational and arithmetic operators and routing constructs. These correspond to medium-sized components, such as comparators, adders, and multiplexers. Module-level combinational circuits are derived with these language constructs.

• Chapter 4 covers the codes for memory elements and the construction of “regular” sequential circuits, such as counters and shift registers, in which the state transitions exhibit a regular pattern.

• Chapter 5 discusses the construction of a finite state machine (FSM), which is a sequential circuit whose state transitions do not exhibit a simple, regular pattern.

• Chapter 6 presents the construction of an FSM with data path (FSMD). The FSMD is used to implement register transfer (RT) methodology, in which the system operation is described by data transfers and manipulations among registers.

• Chapter 7 discusses several more advanced topics on language constructs and coding techniques and introduces the development of more sophisticated testbenches. This chapter can be skipped without affecting the remaining chapters.

Part II applies the techniques from Part I to design an array of peripheral modules for the prototyping board. Each chapter covers the development, implementation, and verification of an individual peripheral. These modules can be incorporated to a larger project. Part II consists of seven chapters:

• Chapter 8 discusses the design of a universal asynchronous receiver and transmitter (UART), which provides a serial link to receive and transmit data via the prototyping board’s RS-232 port.

• Chapter 9 covers the design of a keyboard interface, which reads scan code from a keyboard. The keyboard is connected via the prototyping board’s PS2 port.

• Chapter 10 covers the design of a mouse interface, which obtains the button and movement information from a mouse. The mouse is also connected via the prototyping board’s PS2 port.

• Chapter 11 discusses the implementation and timing issues of a memory controller. The controller is used to read data from and write data to the two static random access memory (SRAM) devices on the S3 board.

• Chapter 12 discusses the inference and application of Spartan-3 device-specific components. The focus is on the FPGA’s internal memory blocks.

• Chapter 13 presents the design and implementation of a video controller. The discussion covers the generation of video synchronization signals and shows the construction of simple bit- and object-mapped graphical interfaces. The monitor is connected to the prototyping board’s VGA port.

• Chapter 14 continues development of the video controller. The discussion illustrates the construction of text interface and general tile-mapped scheme.

Part III introduces an FPGA-based soft-core microcontroller, known as PicoBlaze, and demonstrates the integration of a general-purpose processor and customized circuit. It includes four chapters:

• Chapter 15 provides an overview of the organization and instruction set of PicoBlaze.

• Chapter 16 introduces the basic assembly programming and provides an overview of the development process.

• Chapter 17 discusses PicoBlaze’s I/O feature and illustrates the procedure to derive customized circuits to interface other I/O peripherals.

• Chapter 18 discusses PicoBlaze’s interrupt capability and demonstrates the construction of a customized interrupt-handling circuit.

In addition to regular chapters, the appendix summarizes and lists all code templates.

Special marksxilinx specific We use two special paragraph marks in the book: one for a Xilinx-specific feature and one for Verilog-1995 constructs. While the examples described in the book are implemented on a Xilinx-based prototyping board and the codes are synthesized by Xilinx ISE software, we try to make the HDL codes as device independent and software neutral as possible. Most discussions and codes can be applied to different target devices and different synthesis software as well. However, certain codes or device features are unique to Xilinx ISE software or Spartan-3 FPGA devices. We use the Xilinx specific superscript, as in the heading of this section, to indicate that the discussion in the corresponding section or chapter is unique to Xilinx.

Similarly, we use marginal notes, as shown on the outer edge, to indicate that the discussion in a paragraph is unique to Xilinx. This note indicates that the code or design is no longer portable and needs to be revised when a different software package or target device is used.

The Verilog language was first ratified in 1995 (referred to as Verilog-1995) and then revised in 2001 (referred to as Verilog-2001). Many useful enhancements are added in the revised version. We use Verilog-2001 in this book. If a language construct differs in the two versions, we describe the old syntax briefly in a separate paragraph and use a marginal note, as shown on the outer edge, for this type of discussion. It indicates “for your information” and the materials are included to help readers understand the older Verilog codes.

Instructional use

The book can be a good companion text for an introductory digital systems course or an advanced project-oriented course. In an introductory digital systems course, the book supplies the lab portion of the curriculum. The chapters in Part I basically follow the sequence of a typical curriculum and can be presented along with regular lectures. One or two peripheral modules can be selected as case studies, and corresponding experiments can be used as term projects.

In an advanced project-oriented course, the book provides a base for independent projects. The materials in Part I should be treated as an overview or refresher, which provides a general background on HDL, synthesis, and FPGA boards. Some modules in Part II can be used to demonstrate the design of more complex circuits. These modules can also be considered as building blocks (i.e., IPs) or subsystems to be integrated into final projects. The PicoBlaze microcontroller discussed in Part III can be used as a general-purpose processor if an embedded-system type of project is desired.

Companion Web site

An accompanying Web site (http://academic.csuohio.edu/chu_p/rtl) provides additional information, including the following materials:

• Errata

• Code templates

• HDL code listing and relevant files

• Links to synthesis and simulation software

• Links to referenced materials

• Additional project ideas

Errata   The book is self-prepared, which means that the author has produced all aspects of the text, including illustrations, tables, code listings, indexing, and formatting. As errors are always bound to happen, the accompanying Web site provides an updated errata sheet and a place to report errors.

P. P. CHU

Cleveland, OhioJanuary 2008

ACKNOWLEDGMENTS

The author would like to express his gratitude to Professor George L. Kramerich for his encouragement and help.

The author also thanks John Wiley & Sons, Inc. for giving permission to use Figures 3.1, 3.2,4.2,4.10,4.11, 6.5, and 7.2 from my text RTL Hardware Design Using VHDL: Coding for Efficiency, Portability, and Scalability, and Xilinx, Inc. for giving permission to use Figures 2.3 and 9.3 from the Spartan-3 Starter Kit Board User Guide.

All trademarks used or referred to in this book are the property of their respective owners.

P. P. Chu

PART I

BASIC DIGITAL CIRCUITS

CHAPTER 1

GATE-LEVEL COMBINATIONAL CIRCUIT

1.1 INTRODUCTION

Verilog is a hardware description language. It was developed in the mid-1980s and later transferred to the IEEE (Institute of Electrical and Electronics Engineers). The language is formally defined by IEEE Standard 1364. The standard was ratified in 1995 (referred to as Verilog-1995) and revised in 2001 (referred to as Verilog-2001). Many useful enhancements are added in the revised version. We use Verilog-2001 in this book.

Verilog is intended for describing and modeling a digital system at various levels and is an extremely complex language. The focus of this book is on hardware design rather than the language. Instead of covering every aspect of Verilog, we introduce the key Verilog synthesis constructs by examining a collection of examples. Several advanced topics are examined further in Chapter 7 and detailed Verilog coverage may be explored through the sources listed in the bibliographic section at the end of the chapter.

Although the syntax of Verilog is somewhat like that of the C language, its semantics (i.e., “meaning”) is based on concurrent hardware operation and is totally different from the sequential execution of C. The subtlety of some language constructs and certain inherent non-deterministic behavior of Verilog can lead to difficult-to-detect errors and introduce a discrepancy between simulation and synthesis. The coding of this book follows a “better-safe-than-buggy” philosophy. Instead of writing quick and short codes, the focus is on style and constructs that are clear and synthesizable and can accurately describe the desired hardware.

Table 1.1 Truth table of 1-bit equality comparator

input

output

i0 il

eq

00

1

01

0

10

0

11

1

In this chapter, we use a simple comparator to illustrate the skeleton of a Verilog program. The description uses only logic operators and represents a gate-level combinational circuit, which is composed of simple logic gates. In Chapter 3, we cover the remaining Verilog operators and constructs and examine the register-transfer-level combinational circuits, which are composed of intermediate-sized components, such as adders, comparators, and multiplexers.

1.2 GENERAL DESCRIPTION

Consider a 1-bit equality comparator with two inputs, i0 and i1, and an output, eq. The eq signal is asserted when i0 and i1 are equal. The truth table of this circuit is shown in Table 1.1.

Assume that we want to use basic logic gates, which include not, and, or, and , to implement the circuit. One way to describe the circuit is to use a sum-of-products format. The logic expression is