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Liming Xiu

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Written in a simple, easy to understand style, this book will teach PLL users how to use new clock technology in their work in order to create innovative applications. * Investigates the clock frequency concept from a different perspective--at an application level * Teaches engineers to use this new clocking technology to create innovations in chip/system level, through real examples extracted from commercial products

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IEEE Press445 Hoes Lane Piscataway, NJ 08854

IEEE Press Editorial BoardTariq Samad, Editor in Chief

George W. Arnold

Vladimir Lumelsky

Linda Shafer

Dmitry Goldgof

Pui-In Mak

Zidong Wang

Ekram Hossain

Jeffrey Nanzer

MengChu Zhou

Mary Lanzerotti

Ray Perez

George Zobrist

Kenneth Moore, Director of IEEE Book and Information Services (BIS)

Technical Reviewers

Michael Peter Kennedy, Tyndall National Institute

FROM FREQUENCY TO TIME-AVERAGE-FREQUENCY

A Paradigm Shift in the Design of Electronic Systems

LIMING XIU

Copyright © 2015 by The Institute of Electrical and Electronics Engineers, Inc.

Published by John Wiley & Sons, Inc., Hoboken, New Jersey. All rights reserved.

Published simultaneously in Canada.

No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning, or otherwise, except as permitted under Section 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, Inc., 222 Rosewood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 750-4470, or on the web at www.copyright.com. Requests to the Publisher for permission should be addressed to the Permissions Department, John Wiley & Sons, Inc., 111 River Street, Hoboken, NJ 07030, (201) 748-6011, fax (201) 748-6008, or online at http://www.wiley.com/go/permission.

Limit of Liability/Disclaimer of Warranty: While the publisher and author have used their best efforts in preparing this book, they make no representations or warranties with respect to the accuracy or completeness of the contents of this book and specifically disclaim any implied warranties of merchantability or fitness for a particular purpose. No warranty may be created or extended by sales representatives or written sales materials. The advice and strategies contained herein may not be suitable for your situation. You should consult with a professional where appropriate. Neither the publisher nor author shall be liable for any loss of profit or any other commercial damages, including but not limited to special, incidental, consequential, or other damages.

For general information on our other products and services or for technical support, please contact our Customer Care Department within the United States at (800) 762-2974, outside the United States at (317) 572-3993 or fax (317) 572-4002.

Wiley also publishes its books in a variety of electronic formats. Some content that appears in print may not be available in electronic formats. For more information about Wiley products, visit our web site at www.wiley.com.

Library of Congress Cataloging-in-Publication Data is available.

ISBN: 978-1-110-02732-4

CONTENTS

FOREWORD

PREFACE

A PARADIGM SHIFT

IN ELECTRICAL WORLD WE ONLY DEAL WITH TWO THINGS: LEVEL AND TIME

INTERNET OF THINGS AND THE CLOCK

CLOCK IS ENABLER FOR SYSTEM-LEVEL INNOVATION

WHAT IS NEW ON CLOCK? FLEXIBILITY VERSUS SPECTRUM PURITY

CLOCK IS NOT PLL; IT IS MUCH BIGGER

“JITTERY” CLOCK IS NOT NECESSARILY A BAD THING

THE POWER OF IDEA

ACKNOWLEDGMENT

1 IMPORTANCE OF CLOCK SIGNAL IN MODERN MICROELECTRONIC SYSTEMS

1.1 CLOCK TECHNOLOGY: ONE OF THE FOUR FUNDAMENTAL TECHNOLOGIES IN IC DESIGN

1.2 CLOCK SIGNAL GENERATOR: THE KNOWLEDGE-AND-SKILL GAP BETWEEN ITS CREATOR AND ITS USER

1.3 HOW IS SENSE-OF-TIME CREATED IN ELECTRICAL WORLD?

1.4 ALL MICROELECTRONIC SYSTEMS ARE FREQUENCY DRIVEN

1.5 A NEW KID IN TOWN: THE CLOCK ARCHITECT

REFERENCES

2 EVERYTHING ABOUT THE CLOCK

2.1 CLOCK GENERATION

2.2 CLOCK DISTRIBUTION: FUNCTIONAL

2.3 CLOCK DISTRIBUTION: PHYSICAL

2.4 CLOCK USAGE: SYSTEM PERSPECTIVE

2.5 CLOCK USAGE: ELECTRICAL PERSPECTIVE

2.6 CLOCK SIGNAL QUALITY

2.7 CLOCK NETWORK POWER CONSUMPTION

REFERENCES

3 A DIFFERENT WAY OF CONSTRUCTING A CLOCK SIGNAL: TIME-AVERAGE-FREQUENCY

3.1 MOTIVATION

3.2 CLOCK IS TRIGGER AND GATEKEEPER: ESSENCE OF STAGE-BY-STAGE OPERATION

3.3 TIME-AVERAGE-FREQUENCY: BRIEF REVIEW

3.4 CIRCUIT ARCHITECTURE OF TIME-AVERAGE-FREQUENCY DIRECT PERIOD SYNTHESIS

3.5 THE TWO LONG-LASTING PROBLEMS: SMALL FREQUENCY GRANULARITY AND FAST FREQUENCY SWITCHING

3.6 TIME-AVERAGE-FREQUENCY AND “JITTERY” CLOCK

3.7 FREQUENCY SWITCHING AND WAVEFORM ESTABLISHMENT IN TAF-DPS CLOCK GENERATOR

3.8 ALLAN VARIANCE OF TAF-DPS CLOCK SIGNAL

3.9 BEHAVIOR OF TAF CLOCK SIGNAL UNDER THE SCOPE OF JITTER

3.10 SPECTRUM OF TAF CLOCK SIGNAL

3.11 IMPACT OF IMPLEMENTATION IMPERFECTION

REFERENCES

4 TIME-AVERAGE-FREQUENCY AND SPECIAL CLOCKING TECHNIQUES: GAPPED CLOCK, STRETCHABLE CLOCK, AND PAUSIBLE CLOCK

4.1 GAPPED CLOCK AND SYNCHRONOUS FIFO

4.2 STRETCHABLE CLOCK, PAUSIBLE CLOCK, AND ASYNCHRONOUS FIFO

4.3 TIME-AVERAGE-FREQUENCY OPERATION OF GAPPED CLOCK, STRETCHABLE CLOCK, AND PAUSIBLE CLOCK

REFERENCES

5 MICROELECTRONIC SYSTEM DESIGN IN THE FIELD OF TIME-AVERAGE-FREQUENCY: A PARADIGM SHIFT

5.1 DIGITAL DATA COMMUNICATION IN THE FIELD OF FREQUENCY

5.2 DATA TRANSFER IN TIME-AVERAGE-FREQUENCY FIELD: TRANSMITTING CLOCK AVAILABLE

5.3 DATA TRANSFER IN TIME-AVERAGE-FREQUENCY FIELD: CLOCKLESS TRANSMISSION

5.4 CLOCK DATA RECOVERY IN TIME-AVERAGE-FREQUENCY FIELD

5.5 NETWORK-ON-CHIP GALS STRATEGY IN TIME-AVERAGE-FREQUENCY FIELD

5.6 NETWORK TIME SYNCHRONIZATION IN TIME-AVERAGE-FREQUENCY FIELD: IMPROVED TIME GRANULARITY AND FREQUENCY GRANULARITY

5.7 CRYSTALLESS REFERENCE AND TIME-AVERAGE-FREQUENCY DRIVEN VLSI SYSTEM: SOURCE FOR FREQUENCY REFERENCE

5.8 CRYSTALLESS REFERENCE AND TIME-AVERAGE-FREQUENCY DRIVEN VLSI SYSTEM: HARMONY IN SYSTEM-LEVEL DESIGN

5.9 EFFICIENT IMPLEMENTATION OF MCXO SYSTEM IN TIME-AVERAGE-FREQUENCY FIELD

5.10 CPU THROTTLING IN TIME-AVERAGE-FREQUENCY FIELD

5.11 SPREADING CLOCK ENERGY IN TIME-AVERAGE-FREQUENCY FIELD

5.12 TAF-DPS AS CIRCUIT TECHNIQUE IN BUILDING SPECIAL FUNCTION BLOCKS

REFERENCES

6 TAF-DPS CLOCK GENERATOR AND ON-CHIP CLOCK DISTRIBUTION

6.1 GLOBAL CLOCK DISTRIBUTION AT LOW FREQUENCY

6.2 RESONANT CLOCK DISTRIBUTION NETWORK ASSISTED BY TAF-DPS

6.3 TAF-DPS CLOCK SOURCE AND FPGA

REFERENCES

7 DIGITAL-TO-FREQUENCY CONVERTER: A COMPONENT ENABLING NEW APPLICATION FIELDS

8 CONCLUSION: EVOLUTION OF TIMEKEEPER IN ELECTRICAL WORLD

INDEX

IEEE PRESS SERIES ON MICROELECTRONIC SYSTEMS

EULA

List of Tables

Chapter 2

Table 2.1

Chapter 3

Table 3.1

Table 3.2

Table 3.3

Table 3.4

Table 3.5

Table 3.6

Chapter 4

Table 4.1

Table 4.2

Chapter 5

Table 5.1

Table 5.2

Table 5.3

Table 5.4

Table 5.5

Table 5.6

Table 5.7

Table 5.8

Chapter 7

Table 7.1

Guide

Cover

Table of Contents

Preface

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FOREWORD

DR. AHMAD BAHAIChief Technology OfficerTexas Instruments Inc.Stanford University

Unprecedented innovations in semiconductor technology and manufacturing over last several decades have prompted an impressive growth in high-tech industry, which has immensely influenced our world. Today, electronics has permeated many aspects of our daily lives such as communication, transportation, health, and even our social interactions. A unique combination of efficiency, intelligence, form factor, and affordability of integrated circuits promises to address some of most daunting social and environmental challenges of modern world such as energy, health, and pollution. As more people and things are increasingly connected to each other and to the cloud of massive data and information, we will undoubtedly witness an ever-increasing rate of innovative ideas and applications enabled by semiconductor technology in years to come.

Almost every modern electronic circuit and system requires a timing reference. Reliable generation, transmission, reception, and conditioning and processing of data need timing references as well as some level of synchronization even in asynchronous systems! As the data rate is exponentially growing, the need for accurate timing reference exacerbates. Many advance high-speed data acquisition, interface, and processor-integrated circuits require a clock accuracy of a few femtoseconds (10−15)! In addition to a high-accuracy clock reference, generation of different frequencies and distribution of high-speed timing signal in a compact noisy path across the chip or the board are critical and challenging in high-speed analog and digital signal processing. Since the RMS jitter is inversely proportional to Quality Factor of the circuit, a combination of high-performance clock reference, low-noise circuit architecture, high-performance device, and careful layout is critical for a timing solution. The complexity and cost of clock generation and distribution amount to almost one-third of total board cost in many high-performance electronic boards and modules.

The infrastructure of modern world depends on high-performance clock and timing. High-speed wireless and wired communication networks which are the backbone of Internet and connectivity, power distribution systems, security systems, industrial metrology, scientific research systems, and many other applications increasingly rely on highly accurate and stable timing references.

We have come a long way from using celestial bodies' rotation and revolution as timing references. Modern timing references can provide accuracy, precision, and stability needed for high-performance circuits. Crystal oscillators and its high-stability variations such as VCXO, TCXOs and OCXO, MEMS-based clock references, GPS timing reference, and recently developed chip-scale atomic clocks (CSAC) can provide low jitter and phase noise integrated timing references. Also, advances in phase lock loop, injection-locked oscillators, and frequency synthesizer's theory and techniques such as hybrid and cascade architectures facilitate generation of accurate and stable timing reference at various frequencies as well as recovery and jitter cleaning of timing signal.

As the complexity of electronic systems grows the need for higher performance, robust timing references are becoming more pivotal and challenging. Liming Xiu offers a timely and comprehensive analysis of fundamentals and new approaches in timing and frequency synchronization techniques. The author's theoretical and practical experience through many years of advance R&D in Texas Instruments have been instrumental to providing a useful reference for one of the most challenging topics of today's technology.

I commend Liming for his insightful and articulate text which goes beyond conventional approaches by exposing the readers to many novel ideas and inspiring them to think out of the box.

It's about time.

PREFACE

A PARADIGM SHIFT

The word paradigm is defined in the dictionary as “a framework containing the basic assumptions, ways of thinking, and methodology that are commonly accepted by members of a scientific community.” In his influential book The Structure of Scientific Revolutions, published in 1962, Thomas Kuhn used the term paradigm shift to indicate a change in the basic assumptions (the paradigms) within the ruling theory of science. Today, the term paradigm shift is used widely, both in scientific and nonscientific communities, to describe a profound change in a fundamental model or perception of events.

Ever since the clock concept was introduced into microelectronic system design many decades ago, it was assumed that all the cycles in a clock pulse train have to be equal in their lengths (a rigorous clock signal). One reason that this form of clock signal has dominated microelectronic system design for a long time is that, in the past, the requirement for IC clocking was mostly straightforward. A clock signal with a fixed rate was sufficient for most systems. However, the complexity of future systems changes the game. Low-power operation, low electromagnetic radiation, synchronization among networked devices (e.g., Internet of Things), complex data communication schemes, etc., all require a clock signal that is flexible.

Another reason behind the dominance of this style of rigorous clock is that time, which shows its existence and its flow indirectly through the use of a clock pulse train, is not a physical entity that can be controlled and observed directly. Thus, creating a flexible clock is an inherently difficult task. It demands effort beyond simply playing with various techniques at the circuit level. Philosophically it requires an adjustment, at a fundamental level, in our thinking about the way of clocking microelectronic systems. The “anomaly” in this case is a new perspective on the concept of clock frequency. In this line of argument, the materials presented in this book induce a paradigm shift in the field of microelectronic system design.

IN ELECTRICAL WORLD WE ONLY DEAL WITH TWO THINGS: LEVEL AND TIME

Although there are numerous different types of microelectronic devices and systems supporting the daily operation of our society, we only deal with two things when designing such devices and systems: level and time. Microelectronic devices and systems perform their magic by creating a variety of events that occur inside the silicon chip in a predetermined order. The purpose of such events is to essentially specify “what happens at when.” In the process of creating those events, we need “level” to represent “what” and “time” to describe “when.”

In describing “what,” there are two approaches to implementation: (1) the analog way and (2) the digital way. The analog method uses proportional relationships to describe the physical world. (Physical world: It is the sum of all the stuff around us; you can see it, touch it, taste it, hear it, or smell it. And these five senses are based on the proportional relationship.) By contrast, the digital approach employs a binary system (i.e., on/off) to represent information. It is the natural language for performing computation using microelectronic devices. In the past several decades of silicon chip design, the task of describing “what” has been studied in great depth. Perhaps, it is fair to say that it is a mature art now.

However, we have not been as creative in dealing with “when.” Historically, we were fixed in the belief that any clock cycle has to be exactly the same as any other cycle. Hence, we restrained our hand at making the clockwork for the electrical world. Since “time” is half of the story in “what happens at when,” it can impact the microelectronic system's overall information processing efficiency in great deal. A small step change in the fundamental level (the anomaly) can produce a profound influence on upper level structures. This flow of thought is reflected in the development from the ideas of Chapters 1–4 to their applications in Chapters 5–7.

INTERNET OF THINGS AND THE CLOCK

The Internet of Things (IoT) is a growing network of everyday objects, from industrial machines to consumer goods, which can share information and complete tasks without human interference. It comprises three key components: (1) the things themselves, (2) the communication networks connecting them, and (3) the computing systems that make use of the data flowing among the things. IoT is the catalyst for new business growths across multiple industries, including industrial, medical, consumer, and automotive. The semiconductor industry, which provides chips designed for various IoT applications, is the enabler of this IoT trend. Designers of microelectronic products for IoT applications, however, face several unique challenges. The three most noticeable ones are the ultralow-power challenge, the ultralow-cost challenge, and the miniaturization challenge.

As said, IoT is a network of many things. It implies that the key in IoT is the “connection.” For things in IoT to connect, it requires the establishment of a “common view of time” among the things. In other words, time synchronization of the network plays a major role in IoT. There are two essential pieces for establishing this synchronization: Each thing must have its own time (frequency) source to control its internal operation and there must exist a communication protocol agreed by all the things to establish and maintain the “common view of time.” The design of this communication protocol depends heavily on the quality of the time (frequency) source. In IoT's harsh design environment of ultralow power, extreme small size, and ultralow cost, building a good time (frequency) source for each thing is an extremely challenging task. It requires innovations on clocking. Chapter 5 of this book provides some innovative options to meet this challenge.

CLOCK IS ENABLER FOR SYSTEM-LEVEL INNOVATION

Viewing from a high level, there are four fundamental technologies supporting the entire IC design business: processor technology, memory technology, analog/RF technology, and clock technology. In the past several decades, a tremendous amount of effort has been spent on the development of the first three technologies. Clock technology falls behind in this race. One of the key reasons for this is that, as mentioned before, clock technology deals with a special entity: time. It is neither directly observable nor directly controllable. The circuit designer can only play with it indirectly, through voltage and/or current. This lag, however, provides us an opportunity to make significant progress. It is a battleground for new ideas. It is a potential birthplace for great inventions. It is one of the enablers for system-level innovation. Chapters 5–7 are the first round of effort in this direction.

WHAT IS NEW ON CLOCK? FLEXIBILITY VERSUS SPECTRUM PURITY

When the term flexible clock is used, it refers to a clock signal whose frequency can be (1) arbitrarily set (within a small frequency granularity, similar to the way that voltage level can be arbitrarily reached within a quantization resolution) and (2) changed quickly (similar to the way that voltage level can make transition quickly). Preferably, these two features shall be achieved simultaneously and be available to the clock user at a reasonable cost.

A rigorous clock has the characteristic of high spectrum purity, which is beneficial to certain applications such as functioning as a carrier in wireless communication and as the driving clock for analog-to-digital converter. There are, however, many more applications wherein spectrum purity is not of high concern. Instead, a clock signal possessing the capability of small frequency granularity and fast frequency switching is more useful. Therefore, there is a crucial trade-off to be made when an IC design problem is investigated. In the past, a clock of high spectrum purity was the undeniable winner. However, for future microelectronic system design, this is not necessarily always the case. Chapters 5 and 6 of this book demonstrate that a flexible clock is more cost-effective in solving many emerging problems in modern applications.

CLOCK IS NOT PLL; IT IS MUCH BIGGER

Within the community of IC design professionals, a popular view is that IC clocking is just the PLL (phase-locked loop) design. This is far from the truth. PLL design is just one piece of a big puzzle. The PLL specializes in generating the clock pulse train. There are, however, many other aspects to the clock, including the task of delivering a clock signal, logically and physically, to all the areas that need it. Another important task is the correct use of the clock signal once it actually reaches the destinations (i.e., to drive the cells). This work is important because it can cause system failure if certain conditions are not satisfied (i.e., the setup and hold checks). Moreover, as a signal bearing highly concentrated energy at a particular frequency, the clock is a danger aggressor capable of doing serious damage to other signals around it. Thus, care must be given to avoid this from happening. Furthermore, the clock network consumes the largest percentage of overall chip power consumption. The reduction of power usage is heavily dependent on how the clock is used. Chapter 2 of this book helps the reader establish an appropriate appreciation of the clock: clock is not simply the PLL; it is a much bigger topic.

“JITTERY” CLOCK IS NOT NECESSARILY A BAD THING

Among clock circuit designers and clock signal users, jitter is always a bad thing. The essence of a clock pulse train is to create a series of “moments in the flow of time” by utilizing the mechanism of the “voltage-level-crossing-a-threshold.” The resulting moments are used as the reference points for other events happening inside the microelectronic system. Therefore, the requirement on those moments is that their locations-in-time must be predictable and precise. Jitter is a parameter measuring this quality. Thus, a jittery clock is undesirable since it reduces the effectiveness of the clock in coordinating other events. However, jitter is not without any use. An obvious example of its applicability is that jitter in a clock signal can help reduce its electromagnetic radiation since it spreads the clock energy.

The not-so-obvious, and more valuable, use of a “jittery” clock is to trade the irregularity in the moment with the flexibility. As mentioned, the flexibility associated with a clock signal refers to its capability of fine frequency resolution and fast frequency switching. When used with care of this irregularity in the moment, a clock signal can be made flexible by intentionally introducing “controlled jitter” into it. This capability is important for certain applications, such as in adaptive clock generation and in clock data recovery. Indeed, it outweighs the requirement on the clock's spectrum purity in such applications. Hence, a jittery clock is not necessarily a bad thing. An example is provided in Chapter 5 to support this unconventional view. It also serves as an example of “thinking out of the box.”

THE POWER OF IDEA