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Since its commercialization in 1971, the microprocessor, a modern and integrated form of the central processing unit, has continuously broken records in terms of its integrated functions, computing power, low costs and energy saving status. Today, it is present in almost all electronic devices. Sound knowledge of its internal mechanisms and programming is essential for electronics and computer engineers to understand and master computer operations and advanced programming concepts. This book in five volumes focuses more particularly on the first two generations of microprocessors, those that handle 4- and 8- bit integers. Microprocessor 4 - the fourth of five volumes - addresses the software aspects of this component. Coding of an instruction, addressing modes and the main features of the Instruction Set Architecture (ISA) of a generic component are presented. Futhermore, two approaches are discussed for altering the flow of execution using mechanisms of subprogram and interrupt. A comprehensive approach is used, with examples drawn from current and past technologies that illustrate theoretical concepts, making them accessible.
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Cover
Title page
Copyright
Quotation
Preface
Introduction
1 Coding and Addressing Modes
1.1. Encoding and formatting an instruction
1.2. Addressing modes
1.3. Conclusion
2 Instruction Set and Class
2.1. Definitions
2.2. Transfer instructions
2.3. Data processing instructions
2.4. Control transfer instructions
2.5. Environmental instructions
2.6. Parallelism instructions
2.7. Extensions to instruction sets
2.8. Various instructions
2.9. Conclusion
3 Additional Concepts
3.1. Concepts associated with the instruction set and programming
3.2. Concepts linked to execution
3.3. Hardware and software compatibilities
3.4. Measuring processor performances
3.5. Criteria for choosing
3.6. Conclusion
4 Subroutine
4.1. Stack memory
4.2. Subroutine
4.3. Conclusion
5 Interrupt Mechanism
5.1. Origin, definition and classification
5.2. External causes
5.3. Nested interrupts
5.4. Internal causes
5.5. Debugging
5.6. Priority between internal and external interrupts
5.7. Identification of the source and vectorization
5.8. Nested and queued interrupts
5.9. Uses
5.10. Interrupts and execution modes
5.11. Interrupts and advanced architectures
5.12. Conclusion
Conclusion of Volume 4
Exercises
Appendix
Acronyms
References
Index
End User License Agreement
Chapter 1
Table 1.1.
Possible address combinations in family IA-32
Table 1.2.
Combined MC6809 addressing modes
Chapter 2
Table 2.1.
Logical instructions from DEC System-10
Table 2.2.
Conditional jump instructions for 8086 for whole numbers
Table 2.3.
Condition codes from the Arm® architecture
Chapter 3
Table 3.1. Additional cost in the number of cycles and memory clutter for the MC...
Table 3.2.
Effective address calculation time (8086)
Table 3.3.
Arm® architecture execution modes
Table 3.4.
List of iCOMP benchmarks
Chapter 4
Table 4.1.
Solutions for managing a stack in main memory
Chapter 5
Table 5.1.
Maskable and non-maskable interrupts
Table 5.2. Categories of interrupt to qualify a double fault in 80386 (Intel 198...
Table 5.3.
Decision criteria for qualifying a double fault in 80386 (Intel 1986)
Table 5.4.
Priorities of different interrupts from 8086
Table 5.5.
Table of 256 interrupt vectors from IA-32 architecture
Table 5.6. List of exception codes (ExcCode) for MIPS architecture (Kane 1988; K...
Table 5.7.
Management options in the case of multiple IT processing
Table 5.8.
Table summarizing interrupts
Table 5.9.
Interrupt recovery points for the 80286
Table 5.10.
Recovery point for ITs for the 80286 (real mode)
Table 5.11.
Recovery point for ITs for the 80286 (protected mode)
Table 5.12a. Suggestion for classification criteria according to Hennessy and Pa...
Table 5.12b. Suggestion of classification criteria according to Hennessy and Pat...
Appendix
Table A.1a.
Hexadecimal values of machine codes
Table A.1b.
Hexadecimal values of machine codes
Table A.2a.
Programming aid
Table A.2b.
Programming aid
Table A.2c.
Programming aid
Cover
Table of Contents
Title page
Copyright
Quotation
Preface
Introduction
Begin Reading
Conclusion of Volume 4
Exercises
Appendix
Acronyms
References
Index
End User License Agreement
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Series EditorJean-Charles Pomerol
Philippe Darche
First published 2020 in Great Britain and the United States by ISTE Ltd and John Wiley & Sons, Inc.
Apart from any fair dealing for the purposes of research or private study, or criticism or review, as permitted under the Copyright, Designs and Patents Act 1988, this publication may only be reproduced, stored or transmitted, in any form or by any means, with the prior permission in writing of the publishers, or in the case of reprographic reproduction in accordance with the terms and licenses issued by the CLA. Enquiries concerning reproduction outside these terms should be sent to the publishers at the undermentioned address:
ISTE Ltd27-37 St George’s RoadLondon SW19 4EUUK
www.iste.co.uk
John Wiley & Sons, Inc.111 River StreetHoboken, NJ 07030USA
www.wiley.com
© ISTE Ltd 2020
The rights of Philippe Darche to be identified as the author of this work have been asserted by him in accordance with the Copyright, Designs and Patents Act 1988.
Library of Congress Control Number: 2020943937
British Library Cataloguing-in-Publication Data
A CIP record for this book is available from the British Library
ISBN 978-1-78630-566-4
Every advantage has its disadvantages and vice versa.
Shadokian philosophy1
1
The Shadoks are the main characters from an experimental cartoon produced by the Research Office of the Office de Radiodiffusion-Télévision Française (ORTF). The two- minute-long episodes of this daily cult series were broadcast on ORTF's first channel (the only one at the time!) beginning in 1968. The birds were drawn simply and quickly using an experimental device called an
animograph
.
The Shadoks are ridiculous, stupid and mean. Their intellectual capacities are completely unusual. For example, they are known for bouncing up and down, but it is not clear why! Their vocabulary consists of four words: GA, BU, ZO and MEU, which are also the four digits in their number system (base 4) and the musical notes in their four-tone scale. Their philosophy is comprised of famous mottos such as the one cited in this book.
Computer systems (hardware and software) are becoming increasingly complex, embedded and transparent. It therefore is becoming difficult to delve into basic concepts in order to fully understand how they work. In order to accomplish this, one approach is to take an interest in the history of the domain. A second way is to soak up technology by reading datasheets for electronic components and patents. Last but not least is reading research articles. I have tried to follow all three paths throughout the writing of this series of books, with the aim of explaining the hardware and software operations of the microprocessor, the modern and integrated form of the central unit.
This five-volume series deals with the general operating principles of the microprocessor. It focuses in particular on the first two generations of this programmable component, that is, those that handle integers in 4- and 8-bit formats. In adopting a historical angle of study, this deliberate decision allows us to return to its basic operation without the conceptual overload of current models. The more advanced concepts, such as the mechanisms of virtual memories and cache memory or the different forms of parallelism, will be detailed in a future book with the presentation of subsequent generations, that is, 16-, 32- and 64-bit systems.
The first volume addresses the field's introductory concepts. As in music theory, we cannot understand the advent of the microprocessor without talking about the history of computers and technologies, which is presented in the first chapter. The second chapter deals with storage, the second function of the computer present in the microprocessor. The concepts of computational models and computer architecture will be the subject of the final chapter.
The second volume is devoted to aspects of communication in digital systems from the point of view of buses. Their main characteristics are presented, as well as their communication, access arbitration, and transaction protocols, their interfaces and their electrical characteristics. A classification is proposed and the main buses are described.
The third volume deals with the hardware aspects of the microprocessor. It first details the component's external interface and then its internal organization. It then presents the various commercial generations and certain specific families such as the Digital Signal Processor (DSP) and the microcontroller. The volume ends with a presentation of the datasheet.
The fourth volume deals with the software aspects of this component. The main characteristics of the Instruction Set Architecture (ISA) of a generic component are detailed. We then study the two ways to alter the execution flow with both classic and interrupt function call mechanisms.
The final volume presents the hardware and software aspects of the development chain for a digital system as well as the architectures of the first microcomputers in the historical perspective.
This book gradually transitions from conceptual to physical implementation. Pedagogy was my main concern, without neglecting formal aspects. Reading can take place on several levels. Each reader will be presented with introductory information before being asked to understand more difficult topics. Knowledge, with a few exceptions, has been presented linearly and as comprehensively as possible. Concrete examples drawn from former and current technologies illustrate the theoretical concepts.
When necessary, exercises complete the learning process by examining certain mechanisms in more depth. Each volume ends with bibliographic references including research articles, works and patents at the origin of the concepts and more recent ones reflecting the state of the art. These references allow the reader to find additional and more theoretical information. There is also a list of acronyms used and an index covering the entire work.
This series of books on computer architecture is the fruit of over 30 years of travels in the electronic, microelectronic and computer worlds. I hope that it will provide you with sufficient knowledge, both practical and theoretical, to then specialize in one of these fields. I wish you a pleasant stroll through these different worlds.
IMPORTANT NOTES.– As this book presents an introduction to the field of microprocessors, references to components from all periods are cited, as well as references to computers from generations before this component appeared.
Original company names have been used, although some have merged. This will allow readers to find specification sheets and original documentation for the mentioned integrated circuits on the Internet and to study them in relation to this work.
The concepts presented are based on the concepts studied in selected earlier works (Darche 2000, 2002, 2003, 2004, 2012), which I recommend reading beforehand.
Philippe DARCHEAugust 2020
This volume details how to program a microprocessor in five chapters. The first two chapters demonstrate the three characteristics of ISA (Instruction Set Architecture, cf. § V1-3.5), which are: instruction encoding, addressing modes and the instruction set of a generic component. Then, additional notions linked to the instruction set and execution are discussed in the third chapter. This primarily involves the notion of illegal, invalid, reserved and trusted instructions, the notion of memory alignment, orthogonality and the symmetry of the instruction set, as well as the notion of pure, re-entrant and relocatable code. Then, the subjects of execution time, memory requirements, execution modes, portability and virtualization will be discussed. Finally, it ends with aspects that are very important in industry, their hardware and software compatibilities, how to measure execution performances and the criteria for choosing a microprocessor or MPU (MicroProcessor Unit). The last two chapters study two ways of altering execution flow. These are the concepts of the sub-program and interruption.
NOTE.– The choice has been made to write the names of registers in upper case in the text and figures but in lower case in assembly language, since the norm (IEEE 1985) does not specify which case to use. The name of the instructions is in lower case in the text and programs (MIPS (Microprocessor without Interlocked Pipeline Stages) style), sometimes also in upper case (Motorola or Arm® style). Moreover, the examples given refer to current and older microprocessors and computer processors for the purposes of instruction. This chapter is not intended to be exhaustive. It mainly presents the functions of the first MPUs. It will be completed by the following two books. The instructions cited will be complemented by MPU documentation or in a specialist work.
