SOI Lubistors E-Book

Yasuhisa Omura

• Herausgeber: John Wiley & Sons
• Kategorie: Wissenschaft und neue Technologien
• Serie: Wiley - IEEE
• Sprache: Englisch

Seitenzahl: 402

Veröffentlichungsjahr: 2013

Beschreibung

Advanced level consolidation of the technology, physics and design aspects of silicon-on-insulator (SOI) lubistors No comprehensive description of the physics and possible applications of the Lubistor can be found in a single source even though the Lubistor is already being used in SOI LSIs. The book provides, for the first time, a comprehensive understanding of the physics of the Lubistor. The author argues that a clear understanding of the fundamental physics of the pn junction is essential to allowing scientists and engineers to propose new devices. Since 2001 IBM has been applying the Lubistor to commercial SOI LSIs (large scale integrated devices) used in PCs and game machines. It is a key device in that it provides electrostatic protection to the LSIs. The book explains the device modeling for such applications, and covers the recent analog circuit application of the voltage reference circuit. The author also reviews the physics and the modeling of ideal and non-ideal pn junctions through reconsideration of the Shockley's theory, offering readers an opportunity to study the physics of pn junction. Pn-junction devices are already applied to the optical communication system as the light emitter and the receiver. Alternatively, optical signal modulators are proposed for coupling the Si optical waveguide with the pn-junction injector. The book also explores the photonic crystal physics and device applications of the Lubistor. * Advanced level consolidation of the technology, physics and design aspects of silicon-on-insulator (SOI) lubistors * Written by the inventor of the Lubistor, this volume describes the technology for readers to understand the physics and applications of the device * First book devoted to the Lubistor transistor, presently being utilized in electrostatic discharge (ESD) applications in SOI technology, a growing market for semiconductor devices and advanced technologies * Approaches the topic in a systematic manner, from physical theory, through to modelling, and finally circuit applications This is an advanced level book requiring knowledge of electrical and electronics engineering at graduate level. Contents includes: Concept of Ideal pn Junction/Proposal of Lateral, Unidirectional, Bipolar-Type Insulated-Gate Transistor (Lubistor)/ Noise Characteristics and Modeling of Lubistor/Negative Conductance Properties in Extremely Thin SOI Lubistors/ Two-Dimensionally Confined Injection Phenomena at Low Temperatures in Sub-10-nm-Thick SOI Lubistors/ Experimental Study of Two-Dimensional Confinement Effects on Reverse-Biased Current Characteristics of Ultra-Thin SOI Lubistors/ Gate-Controlled Bipolar Action in Ultra-thin Dynamic Threshold SOI MOSFET/Sub-Circuit Models of SOI Lubistors for Electrostatic Discharge Protection Circuit Design and Their Applications/A New Basic Element for Neural Logic Functions and Functionality in Circuit Applications/Possible Implementation of SOI Lubistors into Conventional Logic Circuits/Potentiality of Electro-Optic Modulator Based on SOI Waveguide/Principles of Parameter Extraction/Feasibility of Lubistor-Based Avalanche Photo Transistor

Leseprobe

Contents

Cover

Title Page

Copyright

Preface

Acknowledgements

Introduction to an Exotic Device World

Part One: Brief Reviewand Modern Applications of Pn-Junction Devices

Chapter 1: Concept of an Ideal pn Junction

References

Chapter 2: Understanding the Non-ideal pn Junction – Theoretical Reconsideration

2.1 Introduction

2.2 Bulk pn-Junction Diode

2.3 Bulk pn-Junction Diode – Reverse Bias

2.4 The Insulated-Gate pn Junction of the SOI Lubistor – Forward Bias

2.5 The Insulated-Gate pn Junction of the SOI Lubistor – Reverse Bias

References

Chapter 3: Modern Applications of the pn Junction

References

Part Two: Physics and Modeling of SOI Lubistors – Thick-Film Devices

Chapter 4: Proposal of the Lateral, Unidirectional, Bipolar-Type Insulated-Gate Transistor (Lubistor)

4.1 Introduction

4.2 Device Structure and Parameters

4.3 Discussion of Current–Voltage Characteristics

4.4 Summary

References

Chapter 5: Experimental Consideration for Modeling of Lubistor Operation

5.1 Introduction

5.2 Experimental Apparatus

5.3 Current–Voltage Characteristics of Lubistors

5.4 Lubistor Potential Profiles and Features

5.5 Discussion

5.6 Summary

References

Chapter 6: Modeling of Lubistor Operation Without an EFS Layer for Circuit Simulations

6.1 Introduction

6.2 Device Structure and Measurement System

6.3 Equivalent Circuit Models of an SOI Lubistor

6.4 Summary

References

Chapter 7: Noise Characteristics and Modeling of Lubistor

7.1 Introduction

7.2 Experiments

7.3 Results and Discussion

7.4 Summary

References

Chapter 8: Supplementary Study on Buried Oxide Characterization

8.1 Introduction

8.2 Physical Model for the Transition Layer

8.3 Capacitance Simulation

8.4 Device Fabrication

8.5 Results and Discussion

8.6 Summary

References

Part Three: Physics and Modeling of SOI Lubistors – Thin-Film Devices

Chapter 9: Negative Conductance Properties in Extremely Thin SOI Lubistors

9.1 Introduction

9.2 Device Fabrication and Measurements

9.3 Results and Discussion

9.4 Summary

References

Chapter 10: Two-Dimensionally Confined Injection Phenomena at Low Temperatures in Sub-10-nm-Thick SOI Lubistors

10.1 Introduction

10.2 Experiments

10.3 Physical Models and Simulations

10.4 Summary

Appendix 10A: Intrinsic Carrier Concentration (niq) and the Fermi Level in 2DSS

Appendix 10B: Calculation of Electron and Hole Densities in 2DSS

References

Chapter 11: Two-Dimensional Quantization Effect on Indirect Tunneling in SOI Lubistors with a Thin Silicon Layer

11.1 Introduction

11.2 Experimental Results

11.3 Theoretical Discussion

11.4 Summary

Appendix 11A: Wave Function Coupling Effect in the Lateral Two-Dimensional-System-to-Three-Dimensional-System (2D-to-3D) Tunneling Process

References

Chapter 12: Experimental Study of Two-Dimensional Confinement Effects on Reverse-Biased Current Characteristics of Ultra-Thin SOI Lubistors

12.1 Introduction

12.2 Device Structures and Experimental Apparatus

12.3 Results and Discussion

12.4 Summary

Appendix 12A: Derivation of Equations (12.6) and (12.9)

References

Chapter 13: Supplementary Consideration of I-V Characteristics of Forward-Biased Ultra-Thin Lubistors

13.1 Introduction

13.2 Device Structures and Bias Configuration

13.3 Results and Discussion

13.4 Summary

References

Chapter 14: Gate-Controlled Bipolar Action in the Ultra-Thin Dynamic Threshold SOI MOSFET

14.1 Introduction

14.2 Device and Experiments

14.3 Results and Discussion

14.4 Channel Polarity Dependence of Bipolar Action

14.5 Summary

References

Chapter 15: Supplementary Study on Gate-Controlled Bipolar Action in the Ultra-Thin Dynamic Threshold SOI MOSFET

15.1 Introduction

15.2 Device Structures and Parameters

15.3 Results and Discussion

15.4 Summary

References

Part Four: Circuit Applications

Chapter 16: Subcircuit Models of SOI Lubistors for Electrostatic Discharge Protection Circuit Design and Their Applications

16.1 Introduction

16.2 Equivalent Circuit Models of SOI Lubistors and their Applications

16.3 ESD Protection Circuit

16.4 Direct Current Characteristics of the ESD Protection Devices and Their SPICE Models

16.5 ESD Event and Performance Evaluation of an ESD Protection Circuit

16.6 Summary

References

Chapter 17: A New Basic Element for Neural Logic Functions and Capability in Circuit Applications

17.1 Introduction

17.2 Device Structure, Model, and Proposal of a New Logic Element

17.3 Circuit Applications and Discussion

17.4 Summary

References

Chapter 18: Sub-1-V Voltage Reference Circuit Technology as an Analog Circuit Application

18.1 Review of Bandgap Reference

18.2 Challenging Study of Sub-1-V Voltage Reference

References

Chapter 19: Possible Implementation of SOI Lubistors into Conventional Logic Circuits

References

Part Five: Optical Device Applications of SOI Lubistors

Chapter 20: Potentiality of Electro-Optic Modulator Based on the SOI Waveguide

20.1 Introduction

20.2 Characterization of the Quasi-One-Dimensional Photonic Crystal Waveguide

20.3 Electro-Optic Modulator Based on the SOI Waveguide

20.4 Summary

References

Part Six: SOI Lubistor as a Testing Tool

Chapter 21: Principles of Parameter Extraction

References

Chapter 22: Charge Pumping Technique

22.1 Introduction

22.2 Experimental and Simulation Details

22.3 Results and Discussion

22.4 Summary

References

Part Seven: Future Prospects

Chapter 23: Overview

23.1 Introduction

23.2 i-MOS Transistor

23.3 Tunnel FET

23.4 Feedback FET

23.5 Potential of Offset-Gate Lubistor

23.6 Si Fin LED with a Multi-quantum Well

23.7 Future of the pn Junction

References

Chapter 24: Feasibility of the Lubistor-Based Avalanche Phototransistor

24.1 Introduction

24.2 Theoretical Formulation of the Avalanche Phenomenon in Direct-Bandgap Semiconductors

24.3 Theoretical Formulation of the Avalanche Phenomenon in Indirect-Bandgap Semiconductors

24.4 Theoretical Consideration of the Avalanche Phenomenon in a One-Dimensional Wire pn Junction

24.5 Summary

References

Part Eight: Summary of Physics for Semiconductor Devices and Mathematics for Device Analyses

Chapter 25: Physics of Semiconductor Devices for Analysis

25.1 Free Carrier Concentration and the Fermi Level in Semiconductors [1]

25.2 Impurity Doping in Semiconductors [1]

25.3 Drift and Diffusion of Carriers and Current Continuity in Semiconductors [1]

25.4 Stationary-State Schrödinger Equation to Analyze Quantum-Mechanical Effects in Semiconductors [2]

25.5 Time-dependent Schrödinger Equation to Analyze Dynamics in Semiconductors [3]

25.6 Quantum Size Effects in Nano-Scale Semiconductors

25.7 Tunneling through Energy Barriers in Semiconductors

25.8 Low-Dimensional Tunneling in Nano-Scale Semiconductors

25.9 Photon Absorption and Electronic Transitions

References

Chapter 26: Mathematics Applicable to the Analysis of Device Physics

26.1 Linear Differential Equation [1]

26.2 Operator Method

26.3 Klein–Gordon-Type Differential Equation [2,3]

References

Bibliography

Index

This edition first published 2013

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Library of Congress Cataloging-in-Publication Data

Omura, Y. (Yasuhisa)

SOI lubistors : lateral, unidirectional, bipolar-type insulated-gate transistors / Yasuhisa Omura.

pages cm

Includes bibliographical references and index.

ISBN 978-1-118-48790-7 (cloth)

1. Insulated gate bipolar transistors. 2. Silicon-on-insulator technology. I. Title. II. Title: Lubistors. III. Title:

Silicon-on-insulator lubistors.

TK7871.96.B55O48 2013

621.3815′28—dc23

2013023085

Preface

In the fields of material science and device technology, the technical term of silicon-on-insulator technology refers to a very interesting system with a long history. In the 1970s, the silicon-on-insulator technology emerged as one of the pre-eminent multi-layer substrate concepts. Many variants were proposed, but most were never commercialized owing to crucial shortcomings in attributes such as reproducibility and qualification. Despite these problems, SIMOX (Separation by IMplanted OXygen), Unibond®, and ELTRAN® wafers are now commercially available.

Among device technologies, the partially depleted (PD) SOI MOSFET, the fully depleted (FD) SOI MOSFET, and the volume-inversion (VI) SOI MOSFET have been extensively studied. After the 1990s, FinFET and GAA MOSFET started to attract attention due to their benefits of intrinsic drivability and immunity to the short-channel effect. IBM successfully developed SOI processor LSIs and alliance companies developed the Cell chip. These LSIs use ESD protection devices for which the SOI device architecture is eminently suitable. One of the ESD protection devices is the SOI Lubistor (Lateral, Uni-directional, Bipolar-type, Insulated-gate transiSTOR); SOI LSIs with Lubistors are already being implemented in many products.

The SOI Lubistor is a pn-junction device and has various operation characteristics including macroscopic minority carrier injection, microscopic carrier recombination, and full quantum-mechanical behavior. I have continuously investigated the device physics of the SOI Lubistor since 1982, resulting in many technical papers. Even though it was invented 30 years ago, no one authorative source on the SOI Lubistor has emerged that can help engineers to understand fully the device physics of the SOI Lubistor. I believe that this book will be useful to device engineers, circuit engineers, and students aiming at future professional positions.

Finally, let me express my great thanks to my wife, Kikuyo, for her strong support over 35 years.

Yasuhisa Omura

Kanagawa, Japan

December 2012

Acknowledgements

I wish to express my sincere thanks to Mr Hisashi Ariyoshi (the former NTT Laboratory Director) for his affirmative support in proposing the patent on the Lubistor, Dr Kotaro Kato (the former NTT Laboratory, Senior Research Engineer, Supervisor) for his warm support of the study on the physics behind the operations of the Lubistor, Prof. Katsutoshi Izumi (Prof. of Osaka Prefecture University, the former NTT Laboratory Director) for his strong support of study, and Prof. Masafumi Yamamoto (Prof. of Hokkaido University, the former group leader of NTT Laboratories) for his helpful technical support. I also express my many thanks to Mr Shigeyuki Wakita (Graduate School of Engineering, Kansai University; presently Sharp Corp., Japan) and Mr Takayuki Tochio (Graduate School of Engineering, Kansai University; presently Panasonic Corp., Japan), and Mr Yoshifumi Ogawa (Graduate School of Engineering, Kansai University; presently Canon Corp., Japan) for their powerful documentation of experiments, device simulations, and circuit simulations. I wish to express my special thanks to Mr Shinji Fujita (Graduate School of Science and Engineering, Kansai University) for his technical assistance at the laboratory.

I express my deep appreciation to Mr Mike Blackburn (TECH-WRITE Corp., Japan) for his continued guidance in English communication over the last 20 years. I also express my thanks to Mr James W. Murphy because his contact triggered the edition of this book, and to Ms Shelly Chow and Ms Clarissa Lim for their stringent guidance on many documents.

Finally, I would like to demonstrate my great appreciation of the American Institute of Physics, the Japan Society of Applied Physics, the Electrochemical Society, the Institute of Electrical and Electronics Engineers (the IEEE), Elsevier Limited, the Institute of Electronics Engineers of Korea (the IEEK), Oxford University Press, and Springer for their kind cooperation in publishing the book.

Introduction to an Exotic Device World

The point-contact junction structure was studied before World War II in order to realize a rectifier suitable for use in the receiver of a radio set. After n-type and p-type semiconductor materials such as Ge were discovered, the physics of the pn junction were extensively studied; research groups in Bell Laboratory provided outstanding contributions to the development of semiconductor technology, as is well known.

The invention of the transistor by Drs J. Bardeen, W.H. Brattain, and W. Shockley (later, the bipolar junction transistor, BJT) obviously introduced a new paradigm, the electronics industry of the United States of America.

On later import, the metal-oxide-semiconductor field-effect transistor (MOSFET) was successfully realized in the 1960s, and its complementary-type MOS (CMOS) circuit gave the worldwide electronics industry a new opportunity for expanding business activities. Today's Internet society has been built upon the wisdom generated by the foregoing scientists and technical staffs in many companies.

I commenced my research into CMOS technology in 1975 in NTT Communication Laboratories after graduating from the Graduate School of Applied Science, Kyushu University. The laboratory staff believed that the MOSFET would be a technology leader in the future and that the known scaling rule promised the appealing device technology to come. However, I was not so interested in the widely studied mainstream technology because I wished to open a new gate leading to a completely new field of device technology.

In 1980, I considered the possibility of subjecting bipolar currents to field-effect control as a result of solitary brainstorming. No published book even raised the possibility of this control. I suppose that nobody could imagine such a peculiar phenomenon because according to the conventional idea, such control is impossible in bulk substrates. One lucky break for me was the silicon-on-insulator (SOI) technology that was being studied in the laboratory; separation by implanted oxygen (SIMOX) technology proved to be the answer I needed! Dr K. Izumi invented the SIMOX technology in the 1970s in NTT Communication Laboratories; later, he was my boss from 1982 to 1996. In the 1980s, I and the collaborating staff in the laboratory successfully fabricated a 50-nm-thick mono-crystalline silicon film using the advanced SIMOX technology. My thought was that such a thin film would be useful in controlling bipolar currents. No book had suggested the concept of the lateral-field-based control of bipolar current because the insulated-gate field effect enables either type of carrier, not both types. However, I did not mind making this off-the-wall prediction because I considered that the confinement of electrons and holes might yield a quasi-single-carrier transport or new recombination physics.

The first fabrication result was not very successful, but it gave me an important hint for the success of the following study; I summarized the fundamental operation of the device, named the Lubistor, based on the physical concept of the device in 1982. In an early stage of the study, I could not fully analyze its characteristics owing to the rather raw quality of the SIMOX substrates available in the 1980s. For a couple of years, I investigated the mysterious behavior of the Lubistor in detail; this study was not published for various reasons. However, through further experimental investigations in the 1980s, I was able to discover, in most part, the physics of the Lubistor. This is described in Chapter 5. For about 10 years after this work, I was unable to devote myself to further investigate the Lubistor owing to the obligations imposed by the laboratory.

I resumed the study in the 1990s after the restructuring of NTT Laboratories. In the 1990s, many scientists in the field of solid-state device physics became interested in nano-scale devices. The fabrication of thin-film Lubistors led me to a new stage in the advanced study of the Lubistor. The possibility that the forward-biased tunneling phenomenon could be found at the pn junction made me excited because it promised a new suite of Lubistor applications.

One surprise was the application of the Lubistor to the ESD protection circuit; IBM developed a Lubistor with an advanced device structure that could be applied to high-power devices. This was probably the real debut of the Lubistor (!) because it was implemented on the SOI processor LSI. I now frequently see the name ‘Lubistor’ in papers published in the field of optical communications; this suggests the next development in Lubistor application. I have provided a necessarily short history of the Lubistor. Although I have watched over the evolution of Lubistor technology, I look forward to being surprised at the exotic applications that might emerge in the next ten years.

In Part One, fundamental physics of pn-junction devices are summarized and advanced consideration is also addressed. Part Two discusses the physics and modeling of SOI Lubistors for the case of a thick-film device; of particular note, the original theory and model are introduced for the first time. In Part Two, the original behavior of the Lubistor stemming from the electric-field shielding layer is discussed along with the other behaviors of Lubistors fabricated on the buried insulator with an abrupt interface. Chapters 6 and 7 of Part Two, and all chapters of Parts Three to Seven, assume the use of a buried-oxide layer with an abrupt interface. In Part Three, the physics and modeling of SOI Lubistors are discussed for the case of thin-film devices. In Part Four, various circuit applications are demonstrated. Applications to ESD protection, the neural logic circuit, the voltage reference circuit, the conventional logic circuit, and the MOS gate-controlled bipolar action in the dynamic threshold SOI MOSFET are discussed. In Part Five, its recent application to the transmission mode tuning of photonic waveguides is introduced. In Part Six, some examples of SOI Lubistors being used as testing tools are reviewed. In Part Seven, the future of SOI Lubistors is briefly foretold.

Part One

Brief Review and Modern Applications of pn-Junction Devices

1

Concept of an Ideal pn Junction

As briefly described in the Introduction, Drs J. Bardeen and W. H. Brattain of Bell Laboratory discovered the amplification of signals by the point-contact transistor [1,2]. Within a few years, Dr W. Shockley developed the pn-junction-based bipolar transistor based on the physics of the pn junction [3].

Before the proposal of the bipolar junction transistor by Dr W. Shockley, many scientists had theoretically analyzed the role of electrons and holes in various semiconductors [4–6]; they used quantum mechanics to understand the potential of semiconductor materials. To acquire a comprehensive understanding of transport properties, many assumptions were introduced and the model of Ge-based pn junction characteristics was proposed. The basic assumptions are as follows:

1. All abrupt transitions in the depletion region, p-type, and n-type regions outside the depletion region are assumed to be quasi-neutral.

2. Carrier density (electrons and holes) outside the depletion region is described by the electrostatic potential difference between the quasi-neutral n-type and p-type regions.

3. A low injection level is assumed. The density of minority carriers injected from the counterpart region is negligibly small so that the local density of majority carriers is altered by the injection.

4. No generation and recombination current exists in the depletion region. The electron current and the hole current are constant across the depletion region.

5. The built-in potential and applied voltages are supported by a dipole layer with abrupt boundaries, not by the quasi-neutral n-type region or by the quasi p-type region.

The above assumptions make it possible easily to derive the so-called Shockley current equation [3]:

(1.1)

where IS denotes the saturation current as a function of the diffusion constant and the minority carrier lifetime for electrons and holes. This equation is derived assuming that the junction current consists of the diffusion current components in the n-type and p-type regions outside the depletion region. VA denotes the supply voltage applied to the diode terminals. Given the assumption of the recombination process in the depletion region, the theoretical calculation of a forward-biased junction current has to face a couple of difficulties. The usual solution is just simplification because the experimental current–voltage curve is roughly the same as the ideal in Equation (1.1). In order to match the experimental results, the above equation is modified to [7]

(1.2)

where n is the ideality factor that effectively takes account of the recombination process; n takes a value between 1 and 2. When the parasitic resistance of quasi-neutral regions (Rpn) is not neglected, Equation (1.2) must be rewritten as

(1.3)

where VA denotes the supply voltage applied to the diode terminals. This equation assumes that the parasitic resistance is almost constant. As this is a transcendental equation, numerical calculation is needed to obtain the current versus voltage characteristics.

As many engineers know, this equation is frequently used in analyzing the actual current characteristics of the Si-based pn-junction diode. A remaining issue is the expression of the saturation current (I0) for the reverse-biased condition. In Equations (1.1) to (1.3), no generation and recombination current is assumed in the depletion region. In the presence of the generation and recombination phenomena, it is known that the junction current increases as the reverse bias voltage rises [7]. In a simplified approximation, this behavior of the pn junction can be integrated into the expression of I0 [7]. The behavior of the pn junction under reverse bias is applied to the photodetector (p-i -n diode and avalanche photodiode), technologies that are familiar to the optical communication field [7]. Recently, the theoretical basis of the pn junction was reviewed in detail [8] in order to develop more reliable numerical simulations. In the following chapters, more realistic and advanced physics-based modeling is considered in order to assist consideration of the Lubistor operation mechanisms.

References

1. Bardeen, J. and Brattain, W.H. (1948) The transistor, a semiconductor triode. Physical Review, 74, 230–231.

2. Bardeen, J. and Brattain, W.H. (1949) Physical principles involved in transistor action. Physical Review, 75, 1208–1225.

3. Shockley, W. (1949) The theory of p-n junctions in semiconductors and p-n junction transistors. Bell System Technical Journal, 28, 435–489.

4. Pearson, G.L. and Bardeen, J. (1949) Electrical properties of pure silicon and silicon alloys containing boron and phosphorus. Physical Review, 75, 865–883.

5. Suhl, H. and Shockley, W. (1949) Concentrating holes and electrons by magnetic fields. Physical Review, 75, 1617–1618.

6. Shockley, W., Pearson, G.L., and Sparks, M. (1949) Current flow across n-p junctions. Physical Review, 75, 180.

7. Sze, S.M. (1981) Physics of Semiconductor Devices, 2nd edn, John Wiley & Sons, org.

8. Laux, S.E. and Hess, K. (1999) Revising the analytic theory of p-n junction impedance: improvements guided by computer simulation leading to a new equivalent circuit. IEEE Transactions on Electron Devices, 46, 396–412.

2

Understanding the Non-ideal pn Junction – Theoretical Reconsideration

2.1 Introduction

Since the pn junction is fabricated classically by diffusion, the characteristics of the pn junction depend on the fabrication technique used [1]. The doping technique uses a specific impurity supplied by a solid source, a liquid source, or a gas source [1]. The diffusion of the impurity is sensitive to the semiconductor's quality because diffusion proceeds via vacancies to realize the atomic transfer mechanism. When the substrate has defects, diffusion is strongly affected by the defects; usually the diffusion constant increases [1].

The current characteristics of pn junctions that are fabricated by various techniques usually depart from those predicted by the ideal, shown by Equation (1.1) in the previous chapter, for a variety of reasons. Sometimes the lifetime of minority carriers is shorter than expected. In that case, engineers usually change the value of IS because IS is a function of the minority carrier lifetime of electrons and holes [2]. However, Equation (1.1) is not assured of reproducing measured results because the assumptions made for Equation (1.1) are overly simplistic. The physics critical to understanding the practical pn junction device are discussed here and in Part Two. How to reproduce the measured results precisely has been little discussed so far because empirical and optional changes to Equation (1.1) are commonly used to overcome the difficulty. Recently, Laux and Hess proposed an advanced theory to reproduce pn junction characteristics [3]. In constructing the circuit simulation model, they considered that the current equation can be expressed only by the diffusion current component. However, their simulation results reveal that the model works well as far as can be seen.