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Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance. Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses: * Interconnect functions, characterisations, electrical properties and wiring requirements * Low-k materials: fundamentals, advances and mechanical properties * Conductive layers and barriers * Integration and reliability including mechanical reliability, electromigration and electrical breakdown * New approaches including 3D, optical, wireless interchip, and carbon-based interconnects Intended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.
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Veröffentlichungsjahr: 2012
Contents
About the Editors
List of Contributors
Preface
Abbreviations
Section I Low-k Materials
1 Low-k Materials: Recent Advances
1.1 Introduction
1.2 Integration Challenges
1.3 Processing Approaches to Existing Integration Issues
1.4 Material Advances to Overcome Current Limitations
1.5 Conclusion
2 Ultra-Low-k by CVD: Deposition and Curing
2.1 Introduction
2.2 Porogen Approach by PECVD
2.3 UV Curing
2.4 Impact of Curing on Structure and Physical Properties: Benefits of UV Curing
2.5 Limit/Issues with the Porogen Approach
2.6 Future of CVD Low-k
2.7 Material Engineering: Adaptation to Integration Schemes
2.8 Conclusion
3 Plasma Processing of Low-k Dielectrics
3.1 Introduction
3.2 Materials and Equipment
3.3 Process Results Characterization
3.4 Interaction of Low-k Dielectrics with Plasma
3.5 Mechanisms of Plasma Damage
3.6 Dielectric Recovery
3.7 Conclusions
4 Wet Clean Applications in Porous Low-k Patterning Processes
4.1 Introduction
4.2 Silica and Porous Hybrid Dielectric Materials
4.3 Impact of Plasma and Subsequent Wet Clean Processes on the Stability of Porous Low-k Dielectrics
4.4 Removal of Post-Etch Residues and Copper Surface Cleaning
4.5 Plasma Modification and Removal of Post-Etch 193 nm Photoresist
Section II Conductive Layers and Barriers
5 Copper Electroplating for On-Chip Metallization
5.1 Introduction
5.2 Copper Electroplating Techniques
5.3 Copper Electroplating Superfill
5.4 Alternative Cu Plating Methods
5.5 Electroplated Cu Properties
5.6 Conclusions
6 Diffusion Barriers
6.1 Introduction
6.2 Metal-Based Barriers as Liners for Cu Seed Deposition
6.3 Advanced Barrier Approaches
6.4 Conclusions
Section III Integration and Reliability
7 Process Integration of Interconnects
7.1 Introduction
7.2 On-Die Interconnects in the Submicrometer Era
7.3 On-Die Interconnects at Sub-100 nm Nodes
7.4 Integration of Low-k Dielectrics in Sub-65 nm Nodes
7.5 Patterning Integration at Sub-65 nm Nodes
7.6 Integration of Conductors in Sub-65 nm Nodes
7.7 Novel Air-Gap Interconnects
8 Chemical Mechanical Planarization for Cu–Low-k Integration
8.1 Introduction
8.2 Back to Basics
8.3 Mechanism of the CMP Process
8.4 CMP Consumables
8.5 CMP Interactions
8.6 Post-CMP Cleaning
8.7 Future Direction
9 Scaling and Microstructure Effects on Electromigration Reliability for Cu Interconnects
9.1 Introduction
9.2 Electromigration Fundamentals
9.3 Cu Microstructure
9.4 Lifetime Enhancement
9.5 Effect of Grain Size on EM Lifetime and Statistics
9.6 Massive-Scale Statistical Study of EM
9.7 Summary
10 Mechanical Reliability of Low-k Dielectrics
10.1 Introduction
10.2 Mechanical Properties of Porous Low-k Materials
10.3 Fracture Properties of Porous Low-k Materials
10.4 Conclusion
11 Electrical Breakdown in Advanced Interconnect Dielectrics
11.1 Introduction
11.2 Reliability Testing
11.3 Lifetime Extrapolation and Models
11.4 Future Trends and Concerns
Section IV New Approaches
12 3D Interconnect Technology
12.1 Introduction
12.2 Dimensional Interconnected Circuits (3DICs) for System Applications
12.3 Advanced Microscopy Techniques for 3D Interconnect Characterization
12.4 Summary
13 Carbon Nanotubes for Interconnects
13.1 Introduction
13.2 Advantage of CNT Vias
13.3 Fabrication Processes of CNT Vias
13.4 Electrical Properties of CNT Vias
13.5 Current Reliability of CNT Vias
13.6 Conclusion
14 Optical Interconnects
14.1 Introduction
14.2 Optical Links
14.3 The Case for Silicon Photonics
14.4 Optical Networks on a Chip
14.5 Integration Strategies
14.6 Conclusion
15 Wireless Interchip Interconnects
15.1 Introduction
15.2 Wireless Interconnect Technologies
15.3 Conclusion
Plates
Index
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Library of Congress Cataloging-in-Publication Data
Advanced interconnects for ULSI technology / [edited by] Mikhail R. Baklanov, Paul S. Ho, Ehrenfried Zschech.p. cm.Includes bibliographical references and index.
ISBN 978-0-470-66254-0 (hardback)1. Interconnects (Integrated circuit technology). 2. Integrated circuits–Ultra large scale integration.I. Baklanov, Mikhail. II. Ho, P. S. III. Zschech, Ehrenfried.TK7874.53.A39 2012621.39′5–dc23
2011038787
A catalogue record for this book is available from the British Library.
Print ISBN: 9780470662540
About the Editors
MIKHAIL R. BAKLANOV
Dr Mikhail R. Baklanov is a Principal Scientist at IMEC. He graduated from the Faculty of Natural Sciences at Novosibirsk State University in 1971 and joined the Institute of Semiconductor Physics of the Siberian Branch of the Russian Academy of Sciences (Novosibirsk). He received his PhD degree (candidate of science) in Physical Chemistry in 1978 and the Doctor of Science degree in 1991. From 1991 to 1995 he headed a Laboratory at the Institute of Semiconductor Physics. He joined the Interuniversity Microelectronics Centre in Belgium (IMEC) in 1995 as a Visiting Professor. In 2000 and 2003 he worked as R&D Manager at XPEQT (Switzerland/Belgium). Since 2003 Mikhail Baklanov has been a Principal Scientist at IMEC. His current interest is related to low-k dielectric films for interconnects in advanced technology nodes and new materials for nanoelectronics. He is serving as a member of Organizing Committees of several international conferences. He has edited and contributed to several books and published more than 200 papers in peer reviewed journals, 24 patents and more than 40 invited presentations at International Conferences.PAUL S. HO
Dr Paul S. Ho is the Director of the Laboratory for Interconnect and Packaging at the University of Texas at Austin. He received his BS degree in Mechanical Engineering from National Chengkung University, MS degree in physics from the National Tsinghua University, both in Taiwan, and PhD degree in Physics from Rensselaer Polytechnic Institute. He joined the Materials Science and Engineering Department at Cornell University in 1966 and became an Associate Professor in 1972. In 1972, he joined the IBM T.J. Watson Research Center and became Senior Manager of the Interface Science Department in 1985. In 1991, he joined the faculty at the University of Texas at Austin and was appointed the Cockrell Family Regents Chair in Materials Science and Engineering. His current research is in the areas of materials science and reliability for interconnect and packaging for microelectronics. He has edited several books and published extensively in the area of thin films and materials science for microelectronics. He has received several technical awards, including the Callinan Award from the Electrochemical Society in 2000 and the University Research Award from the Semiconductor Industry Association in 2007. He is a Fellow of the American Physical Society, the American Vacuum Society and the Institute of Electrical and Electronics Engineering.EHRENFRIED ZSCHECH
Dr Ehrenfried Zschech is working at the Fraunhofer Institute for Nondestructive Testing (IZFP). He was Senior Manager of the Center for Complex Analysis at GLOBALFOUNDRIES in Dresden. He joined Advanced Micro Devices in 1997. His responsibilities include the analytical support for process control and technology development, as well as physical failure analysis. He received his diploma degree in solid-state physics and his Dr rer. nat. degree from Dresden University of Technology. After having spent four years as a project leader in the field of metal physics and reliability of microelectronics interconnects at the Research Institute of Non-Ferrous Metals in Freiberg, he was appointed as a university teacher for ceramic materials at Freiberg University of Technology. In 1992, he joined the development department at Airbus in Bremen. There he managed the metal physics group and worked on laser joining metallurgy of light metals. His current research interests are in the areas of thin film materials compatibility, structure and materials analysis and physical failure analysis in integrated circuit applications. He has published three books and more than 100 papers in scientific journals in the areas of solid-state physics and materials science.
List of Contributors
Oliver AubelGLOBALFOUNDRIES, Dresden Module One LLC & Co. KG, Wilschdorfer Landstrasse 101, 01109 Dresden, GermanyMikhail R. Baklanov
IMEC, Kapeldreef 75, B-3001 Leuven, BelgiumSridhar BalakrishnanIntel Corp., Hillsboro, OR 97124, USAGautam BanerjeeAir Products and Chemicals, Inc., Allentown, PA 18195, USAWim BogaertsGhent University – IMEC, Department of Information Technology, Ghent, BelgiumRuth BrainIntel Corp., Hillsboro, OR 97124, USAJean-François de MarneffeIMEC, Kapeldreef 75, B-3001 Leuven, BelgiumAlain DieboldCollege of Nanoscale Science and Engineering at the University at Albany, Albany, New York, USAValery M. DubinNANO3D SYSTEMS LLC, Portland, Oregon, USAGeraud DuboisHybrid Polymeric Materials Group, IBM Almaden Research Center, 650 Harry Road, K-17/E-1, San Jose, CA95120, USALaurent FavennecSTMicroelectronics, 850 rue Jean Monnet, 38921 Crolles, FranceOlivier GourhantSTMicroelectronics, 850 rue Jean Monnet, 38921 Crolles, FranceMeike HauschildtGLOBALFOUNDRIES, Dresden Module One LLC & Co. KG, Wilschdorfer Landstrasse 101, 01109 Dresden, GermanyMichael HeckerCenter for Complex Analysis, GLOBALFOUNDRIES, Dresden Module One LLC & Co. KG, Wilschdorfer Landstrasse 101, 01109 Dresden, GermanyPaul S. HoLab for Interconnect and Packaging, The University of Texas at Austin, UT-PRC 10100 Burnet Road, Bldg 160, Mail Code R8650, Austin, TX 78758, USAChao-Kun HuIBM Research Division, T.J. Watson Research Center, Yorktown Heights, NY 10598, USAHuai HuangLab for Interconnect and Packaging, The University of Texas at Austin, UT-PRC 10100 Burnet Road, Bldg 160, Mail Code R8650, Austin, TX 78758, USARené HübnerFraunhofer Institute for Non-Destructive Testing IZFP, Dresden Branch, Maria-Reiche-Strasse 2, 01109 Dresden, GermanyVincent JousseaumeCEA-LETI, MINatec Campus, 17 rue des Martyrs, 38054 Grenoble Cedex 9, FranceAkio KawabataMIRAI-Selete, 10-1 Morinosato-Wakamiya, Atsugi 243-0197, JapanTakamaro KikkawaResearch Institute for Nanodevices and Bio Systems, Hiroshima University, 1-4-2 Kagamiyama, Higashi-hiroshima, Hiroshima 739-8527, JapanEls KestersIMEC, Kapeldreef 75, B-3001 Leuven, BelgiumJohn U. KnickerbockerIBM Research Division, Thomas J. Watson Research Center, Yorktown Heights, NY 10598, USALay Wai KongCollege of Nanoscale Science and Engineering at the University at Albany, Albany, New York, USAQuoc Toan LeIMEC, Kapeldreef 75, B-3001 Leuven, BelgiumHan LiIBM Research Division, Thomas J. Watson Research Center, Yorktown Heights, NY 10598, USASven NieseFraunhofer Institute for Non-Destructive Testing IZFP, Dresden Branch, Maria-Reiche-Strasse 2, 01109 Dresden, GermanyMizuhisa NiheiMIRAI-Selete, 10-1 Morinosato-Wakamiya, Atsugi 243-0197, JapanEnnis T. OgawaBroadcom Corporation, Irvine, CA 92617, USAMotonobu SatoMIRAI-Selete, 10-1 Morinosato-Wakamiya, Atsugi 243-0197, JapanShintaro SatoMIRAI-Selete, 10-1 Morinosato-Wakamiya, Atsugi 243-0197, JapanDenis ShamiryanGLOBALFOUNDRIES, Dresden Module One LLC & Co. KG, Wilschdorfer Landstrasse 101, 01109 Dresden, GermanyHualiang ShiINTEL Corporation, Chandler, Arizona, USAHerbert StruyfIMEC, Kapeldreef 75, B-3001 Leuven, BelgiumKris VanstreelsIMEC, Kapeldreef 75, B-3001 Leuven, BelgiumGuy VereeckeIMEC, Kapeldreef 75, B-3001 Leuven, BelgiumJoost J. VlassakSchool of Engineering and Applied Sciences, Harvard University, Cambridge, MA 02138, USAWilli VolksenAdvanced Organic Materials Group, IBM Almaden Research Center, 650 Harry Road, K-17/E-1, San Jose, CA95120, USAAziz ZenasniCEA-LETI, MINatec Campus, 17 rue des Martyrs, 38054 Grenoble Cedex 9, FranceLijuan ZhangIBM System and Technology Group, Hopewell Junction, NY 12533, USALarry ZhaoIntel Corp., Hillsboro, OR 97124, USAEhrenfried ZschechFraunhofer Institute for Non-Destructive Testing IZFP, Dresden Branch, Maria-Reiche-Strasse 2, 01109 Dresden, Germany
Abbreviations
1MS
methylsilane
2MS
dimethylsilane
3MS
trimethylsilane
4MS
tetramethylsilane
AAS
atomic absorption spectrometry
AES
Auger electron spectroscopy
AFM
atomic force microscopy
ALD
atomic layer deposition
APD
avalanche photodetector
ARXPS
angle-resolved XPS
ATR-FTIR
attenuated total reflectance FTIR
ATRP
a-terpinene
AWG
arrayed waveguide grating
BCHD
bicyclohexadiene
BDV
distribution of breakdown voltage
BEOL
back-end-of-line
BMO
butadiene monoxide
BTASE
bis(trialkoxysilyl)ethane
BTASM
bis(trialkoxysilyl)methane
BTESEN
bis(trialkoxysilyl)ethene
BTMSM
bistrimethylsilyl methane
BTS
bias-temperature stress
C4
controlled-collapsed-chip connection
CBED
convergent beam electron diffraction
CCP
capacitively coupled plasma
CD
critical dimensions
CDO
carbon-doped oxide
CHO
cyclohexene oxide
CMOS
complementary metal oxide semiconductor
CMP
chemical–mechanical polishing
CP
carbosilane precursor
CPI
chip packaging interaction
CPO
cyclopentene oxide
CTE
coefficient of thermal expansion
CVD
chemical vapour deposition
DD
dual damascene
DEMS
diethoxymethylsilane
DFB
distributed feedback (laser)
DMCPS
decamethylcyclopentasiloxane
DMSO
dimethyl sulfoxide
DSP
downstream plasma
E
Young’s modulus
EB
electron beam
EBSD
electron backscatter diffraction
ED
electron diffraction
EDXS
energy dispersive X-ray spectroscopy
EELS
electron energy loss spectroscopy
EFTEM
energy-filtered TEM
ELK
extreme low-k
ELP
electroless plating
EM
electromigration
EP
ellipsometric porosimetry
ERR
energy release rate
FACVD
filament-assisted chemical vapour deposition
FD
framework density
FEOL
front-end-of-line
FIB
focused ion beam
FM
frequency modulation
FOUP
front opening universal pod
FP
Fabry–Perot (cavity)
FTIR
Fourier transform infrared (spectroscopy)
G
fracture resistance
GB
grain boundaries
GDOES
glow discharge optical emission spectroscopy
GISAXS
grazing incidence small-angle X-ray scattering
H
hardness
HBPCSO
hyperbranched polycarbosiloxane
HMDS
hexamethyldisilazane
HPC
high-performance computing
HPLC
high-performance liquid chromatography
HSSL
high suppression strength levelers
I/O
input–output
ICP
inductively coupled plasma
iCVD
initiated CVD
ILD
interlayer dielectric
ITRS
International Technology Roadmap for Semiconductors
KD
Kikuchi diffraction
LSV
linear sweep voltammograms
Me
methyl
MEA
monoethanolamine
MEL
zeolite with a two-dimensional 10-ring pore structure
MEMS
microelectromechanical systems
MFI
zeolite with a two-dimensional 10-ring pore structure and pore size 5.5 Å
MMR
material removal rate
MNL
molecular nanolayers (self-assembled)
MP
methyl-2-pyrrolidone
MPS
3-mercaptopropylsulfonate
MSSQ
methylsilsesquioxane
MTMS
methyltrimethoxysilane
MZI
Mach–Zehnder interferometer
NBD
norbornadiene
NBE
norbornene
NBECVD
neutral-beam-enhanced CVD
NBED
nanobeam electron diffraction
NMR
nuclear magnetic resonance
OF
PSZ organic functionalized PSZ
OnoC
optical network on a chip
OOK
on–off keying (modulation format)
OPC
optical proximity correction
OPL
organic planarization layer
ORP
oxidation–reduction potential
OSG
organo-silicate glass
PALS
positronium annihilation lifetime spectroscopy
PC
propylene carbonate
PCBO
post-CMP bake-out
PCG
planar curved grating
PEALD
plasma-enhanced atomic layer deposition
PEBO
post-etch bake-out
PECVD
plasma-enhanced chemical vapour deposition
PEG
polyethylene glycol
PID
plasma-induced damage
PPG
polypropylene glycol
PR
photoresist
PS
pitch splitting (of a metal layer)
PSZ
pure silica zeolites
PVD
physical vapor deposition
RIE
reactive ion etching
SAED
selected area electron diffraction
ScCO2
supercritical CO2
SEM
scanning electron microscopy
SIMS
secondary ion mass spectroscopy
SIV
stress-induced voiding
SOI
silicon on insulator
SP
spacer patterning
SPS
bis(3-sulfopropyl) disulfide
TDDB
time-dependent dielectric breakdown
TDESC
1,3,5-tris(diethoxysila)cyclohexane
TDS
thermal desorption spectroscopy
TE
transverse electric field (polarization)
TEM
transmission electron microscopy
TEOS
tetraethyl-ortho-silicate
TGA
thermogravimetric analysis
TIA
transimpedance amplifier
TM
transverse magnetic field (polarization)
TMAH
tetramethylammonium hydroxide
TMCTS
tetramethylcyclotetrasiloxane
TMOS
tetramethyl-ortho-silicate
TPAOH
tetrapropylammonium hydroxide
TSV
through-silicon via
TVMOS
trivinylmethoxysilane
TVS
triangular voltage sweep
ULK
ultra-low-k
UV
ultraviolet
UVSE
UV spectroscopic ellipsometry
V3D3
trimethyltrivinylcyclotrisiloxane
V4D4
tetravinyltetramethylcylclotetrasiloxane
VCSEL
vertical cavity surface emitting laser
VTMOS
vinyltrimethoxysilane
VTMS
vinyltrimethylsilane
VUV
vacuum ultraviolet
WDM
wavelength division multiplexing
XPS
X-ray photoelectron spectroscopy
XRD
X-ray diffraction
XRF
X-ray fluorescence
XRR
X-ray reflectivity
ZLK
zeolite-inspired low-k
Section I
Low-k Materials
