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- Herausgeber: John Wiley & Sons
- Kategorie: Wissenschaft und neue Technologien
- Sprache: Englisch
Presents the latest developments in switchgear and DC/DC converters for DC grids, and includes substantially expanded material on MMC HVDC This newly updated edition covers all HVDC transmission technologies including Line Commutated Converter (LCC) HVDC; Voltage Source Converter (VSC) HVDC, and the latest VSC HVDC based on Modular Multilevel Converters (MMC), as well as the principles of building DC transmission grids. Featuring new material throughout, High Voltage Direct Current Transmission: Converters, Systems and DC Grids, 2nd Edition offers several new chapters/sections including one on the newest MMC converters. It also provides extended coverage of switchgear, DC grid protection and DC/DC converters following the latest developments on the market and in research projects. All three HVDC technologies are studied in a wide range of topics, including: the basic converter operating principles; calculation of losses; system modelling, including dynamic modelling; system control; HVDC protection, including AC and DC fault studies; and integration with AC systems and fundamental frequency analysis. The text includes: * A chapter dedicated to hybrid and mechanical DC circuit breakers * Half bridge and full bridge MMC: modelling, control, start-up and fault management * A chapter dedicated to unbalanced operation and control of MMC HVDC * The advancement of protection methods for DC grids * Wideband and high-order modeling of DC cables * Novel treatment of topics not found in similar books, including SimPowerSystems models and examples for all HVDC topologies hosted by the 1st edition companion site. High Voltage Direct Current Transmission: Converters, Systems and DC Grids, 2nd Edition serves as an ideal textbook for a graduate-level course or a professional development course.
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Veröffentlichungsjahr: 2019
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Table of Contents
Cover
Preface
Part I: HVDC with Current Source Converters
1 Introduction to Line Commutated HVDC
1.1 HVDC Applications
1.2 Line Commutated HVDC Components
1.3 DC Cables and Overhead Lines
1.4 LCC HVDC Topologies
1.5 Losses in LCC HVDC Systems
1.6 Conversion of AC Lines to DC
1.7 Ultra High Voltage HVDC
2 Thyristors
2.1 Operating Characteristics
2.2 Switching Characteristics
2.3 Losses in HVDC Thyristors
2.4 Valve Structure and Thyristor Snubbers
2.5 Thyristor Rating Selection and Overload Capability
3 Six‐pulse Diode and Thyristor Converter
3.1 Three‐phase Uncontrolled Bridge
3.2 Three‐phase Thyristor Rectifier
3.3 Analysis of Commutation Overlap in a Thyristor Converter
3.4 Active and Reactive Power in a Three‐phase Thyristor Converter
3.5 Inverter Operation
4 HVDC Rectifier Station Modelling, Control and Synchronisation with AC System
4.1 HVDC Rectifier Controller
4.2 Phase‐locked Loop
4.3 Master‐level HVDC Control
5 HVDC Inverter Station Modelling and Control
5.1 Inverter Controller
5.2 Commutation Failure
6 HVDC System
V–I
Diagrams and Operating Modes
6.1 HVDC Equivalent Circuit
6.2 HVDC
V
–
I
Operating Diagram
6.3 HVDC Power Reversal
7 HVDC Analytical Modelling and Stability
7.1 Introduction to Converter and HVDC Modelling
7.2 HVDC Analytical Model
7.3 CIGRE HVDC Benchmark Model
7.4 Converter Modelling, Linearisation, and Gain Scheduling
7.5 AC System Modelling for HVDC Stability Studies
7.6 LCC Converter Transformer Model
7.7 DC System Including DC Cable
7.8 Accurate DC Cable Modelling
7.9 HVDC–HVAC System Model
7.10 Analytical Dynamic Model Verification
7.11 Basic HVDC Dynamic Analysis
7.12 HVDC Second Harmonic Instability
7.13 100 Hz Oscillations on the DC Side
8 HVDC Phasor Modelling and Interactions with AC System
8.1 Converter and DC System Phasor Model
8.2 Phasor AC System Model and Interaction with DC System
8.3 Inverter AC Voltage and Power Profile as DC Current is Increasing
8.4 Influence of Converter Extinction Angle
8.5 Influence of Shunt Reactive Power Compensation
8.6 Influence of Load at the Converter Terminals
8.7 Influence of Operating Mode (DC Voltage Control Mode)
8.8 Rectifier Operating Mode
9 HVDC Operation with Weak AC Systems
9.1 Introduction
9.2 Short Circuit Ratio and Equivalent Short Circuit Ratio
9.3 Background on Power Transfer Between Two AC Systems
9.4 Phasor Study of Converter Interactions with Weak AC Systems
9.5 System Dynamics (Small Signal Stability) with Low SCR
9.6 Control and Main Circuit Solutions for Weak AC Grids
9.7 LCC HVDC with SVC
9.8 Capacitor Commutated Converters for HVDC
9.9 AC System with Low Inertia
10 Fault Management and HVDC System Protection
10.1 Introduction
10.2 DC Line Faults
10.3 AC System Faults
10.4 Internal Faults
10.5 System Reconfiguration for Permanent Faults
10.6 Overvoltage Protection
11 LCC HVDC System Harmonics
11.1 Harmonic Performance Criteria
11.2 Harmonic Limits
11.3 Thyristor Converter Harmonics
11.4 Harmonic Filters
11.5 Non‐characteristic Harmonic Reduction Using HVDC Controls
Part I: Line Commutated Converter HVDC
Part II: HVDC with Voltage Source Converters
12 VSC HVDC Applications and Topologies, Performance and Cost Comparison with LCC HVDC
12.1 Application of Voltage Source Converters in HVDC
12.2 Comparison with LCC HVDC
12.3 HVDC Technology Landscape
12.4 Overhead and Subsea/Underground VSC HVDC Transmission
12.5 DC Cable Types with VSC HVDC
12.6 Monopolar and Bipolar VSC HVDC Systems
12.7 VSC HVDC Converter Topologies
12.8 VSC HVDC Station Components
12.9 AC Inductors
12.10 DC Inductors
13 IGBT Switches and VSC Converter Losses
13.1 Introduction to IGBT and IGCT
13.2 General VSC Converter Switch Requirements
13.3 IGBT Technology
13.4 High Power IGBT Devices
13.5 IEGT Technology
13.6 Losses Calculation
13.7 Balancing Challenges in Two‐level IGBT Valves
13.8 Snubbers Circuits
14 Single‐phase and Three‐phase Two‐level VSC Converters
14.1 Introduction
14.2 Single‐phase VSC
14.3 Three‐phase VSC
14.4 Square‐wave, Six‐pulse Operation
15 Two‐level PWM VSC Converters
15.1 Introduction
15.2 PWM Modulation
15.3 Sinusoidal Pulse Width Modulation
15.4 Third Harmonic Injection
15.5 Selective Harmonic Elimination Modulation
15.6 Converter Losses for Two‐level SPWM VSC
15.7 Harmonics with PWM
15.8 Comparison of PWM Modulation Techniques
16 Multilevel VSC Converters in HVDC Applications
16.1 Introduction
16.2 Modulation Techniques for Multilevel Converters
16.3 Neutral Point Clamped Multilevel Converter
16.4 Half Bridge MMC
16.5 Full Bridge MMC
16.6 Comparison of Multilevel Topologies
17 Two‐level VSC HVDC Modelling, Control, and Dynamics
17.1 PWM Two‐level Converter Average Model
17.2 Two‐level PWM Converter Model in DQ Frame
17.3 VSC Converter Transformer Model
17.4 Two‐level VSC Converter and AC Grid Model in the ABC Frame
17.5 Two‐level VSC Converter and AC Grid Model in a DQ Rotating Coordinate Frame
17.6 VSC Converter Control Principles
17.7 The Inner Current Controller Design
17.8 Outer Controller Design
17.9 Complete Two‐level VSC Converter Controller
17.10 Small Signal Linearised VSC HVDC Model
17.11 Small Signal Dynamic Studies
18 Two‐level VSC HVDC Phasor‐domain Interaction with AC Systems and PQ Operating Diagrams
18.1 Power Exchange Between Two AC Voltage Sources
18.2 Converter Phasor Model and Power Exchange with an AC System
18.3 Phasor Study of VSC Converter Interaction with AC System
18.4 Operating Limits
18.5 Design Point Selection
18.6 Influence of AC System Strength
18.7 Influence of AC System Impedance Angle (
X
s
/
R
s
)
18.8 Influence of Transformer Reactance
18.9 Influence of Converter Control Modes
18.10 Operation with Very Weak AC Systems
19 Half Bridge MMC: Dimensioning, Modelling, Control, and Interaction with AC System
19.1 Basic Equations and Steady‐state Control
19.2 Steady‐state Dimensioning
19.3 Half Bridge MMC Non‐linear Average Dynamic Model
19.4 Non‐linear Average Value Model Including Blocked State
19.5 HB MMC HVDC Start‐up and Charging MMC Cells
19.6 HB MMC Dynamic DQ Frame Model and Phasor Model
19.7 Second Harmonic of Differential Current
19.8 Complete MMC Converter DQ Model in Matrix Form
19.9 Second‐harmonic Circulating Current Suppression Controller
19.10 Simplified DQ Frame Model with Circulating Current Controller
19.11 Phasor Model of MMC with Circulating Current Suppression Controller
19.12 Simplified Dynamic MMC Model Using Equivalent Series Capacitor
C
MMC
19.13 Full Dynamic Analytical HB MMC Model
19.14 HB MMC Controller and Arm Voltage Control
19.15 MMC Total Series Reactance and Comparison with Two‐level VSC
19.16 MMC Interaction with AC System and PQ Operating Diagrams
20 Full Bridge MMC Converter: Dimensioning, Modelling, and Control
20.1 FB MMC Arm Voltage Range
20.2 Full Bridge MMC Converter Non‐linear Average Model
20.3 FB MMC Non‐linear Average Model Including Blocked State
20.4 Full Bridge MMC Cell Charging
20.5 Hybrid MMC Design
20.6 Full Bridge MMC DC Voltage Variation Using a Detailed Model
20.7 FB MMC Analytical Dynamic
DQ
Model
20.8 Simplified FB MMC Model
20.9 FB MMC Converter Controller
21 MMC Converter Under Unbalanced Conditions
21.1 Introduction
21.2 MMC Balancing Controller Structure
21.3 Balancing Between Phases (Horizontal Balancing)
21.4 Balancing Between Arms (Vertical Balancing)
21.5 Simulation of Balancing Controls
21.6 Operation with Unbalanced AC Grid
22 VSC HVDC Under AC and DC Fault Conditions
22.1 Introduction
22.2 Faults on the AC System
22.3 DC Faults with Two‐level VSC
22.4 Influence of DC Capacitors
22.5 VSC Converter Modelling Under DC Faults and VSC Diode Bridge
22.6 VSC Converter Mode Transitions as DC Voltage Reduces
22.7 DC Faults with Half Bridge Modular Multilevel Converter
22.8 Full Bridge MMC Under DC Faults
23 VSC HVDC Application For AC Grid Support and Operation with Passive AC Systems
23.1 VSC HVDC High Level Controls and AC Grid Support
23.2 HVDC Embedded Inside an AC Grid
23.3 HVDC Connecting Two Separate AC Grids
23.4 HVDC in Parallel with AC
23.5 Operation with a Passive AC System and Black Start Capability
23.6 VSC HVDC Operation with Offshore Wind Farms
23.7 VSC HVDC Supplying Power Offshore and Driving a MW‐Size Variable Speed Motor
Part II: Voltage Source Converter HVDC
Part III: DC Transmission Grids
24 Introduction to DC Grids
24.1 DC versus AC Transmission
24.2 Terminology
24.3 DC Grid Planning, Topology, and Power Transfer Security
24.4 Technical Challenges
24.5 DC Grid Building by Multiple Manufacturers – Interoperability
24.6 Economic Aspects
25 DC Grids With Line Commutated Converters
25.1 Multiterminal LCC HVDC
25.2 Italy–Corsica–Sardinia Multiterminal HVDC Link
25.3 Connecting the LCC Converter to a DC Grid
25.4 Control of LCC Converters in DC Grids
25.5 Control of LCC DC Grids Through DC Voltage Droop Feedback
25.6 Managing LCC DC Grid Faults
25.7 Reactive Power Issues
25.8 Employing LCC Converter Stations in Established DC Grids
26 DC Grids with Voltage Source Converters and Power Flow Model
26.1 Connecting a VSC Converter to a DC Grid
26.2 Multiterminal VSC HVDC Operating in China
26.3 DC Grid Power Flow Model
26.4 DC Grid Power Flow Under DC Faults
27 DC Grid Control
27.1 Introduction
27.2 Fast Local VSC Converter Control in DC Grids
27.3 DC Grid Dispatcher with Remote Communication
27.4 Primary, Secondary, and Tertiary DC Grid Control
27.5 DC Voltage Droop Control for VSC Converters in DC Grids
27.6 Three‐level Control for VSC Converters with Dispatcher Droop
27.7 Power Flow Algorithm When DC Powers are Regulated
27.8 Power Flow and Control Study of CIGRE DC Grid Test System
28 DC Circuit Breakers
28.1 Introduction
28.2 Challenges with DC Circuit Opening
28.3 DC CB Operating Principles and a Simple Model
28.4 DC CB Performance Requirements
28.5 Practical HV DC CBs
28.6 Mechanical DC CB
28.7 Semiconductor‐based DC CB
28.8 Hybrid DC CB
29 DC Grid Fault Management and Protection System
29.1 Introduction
29.2 Fault Current Components in DC Grids
29.3 DC System Protection Coordination with AC System Protection
29.4 DC Grid Protection System Development
29.5 DC Grid Protection System Based on Local Measurements
29.6 Blocking MMC Converters Under DC Faults
29.7 Differential DC Grid Protection Strategy
29.8 Selective Protection for Star‐topology DC Grids
29.9 DC Grids with DC Fault‐tolerant VSC Converters
29.10 DC Grids with Full Bridge MMC Converters
30 High Power DC/DC Converters and DC Power Flow Controlling Devices
30.1 Introduction
30.2 Power Flow Control Using Series Resistors
30.3 Low‐stepping‐ratio DC/DC Converters (DC Choppers)
30.4 Non‐isolated MMC‐based DC/DC Converter (M2DC)
30.5 DC/DC Converters with DC Polarity Reversal
30.6 High‐stepping‐ratio Isolated DC/DC Converter (Dual Active Bridge DC/DC)
30.7 High‐stepping‐ratio LCL DC/DC Converter
30.8 Building DC Grids with DC/DC Converters
30.9 DC Hubs
30.10 Developing DC Grids Using DC Hubs
30.11 North Sea DC Grid Topologies
Part III: DC Transmission Grids
Appendix A: Variable Notations
Appendix B: Analytical Background to Rotating DQ Frame
B.1 Transforming AC Variables to a DQ Frame
B.2 Derivative of an Oscillating Signal in a DQ Frame
B.3 Transforming an AC System Dynamic Equation to a DQ Frame
B.4 Transforming an
n
‐Order State Space AC System Model to a DQ Frame
B.5 Static (Steady‐state) Modeling in a Rotating DQ Coordinate Frame
B.6 Representing the Product of Oscillating Signals in a DQ Frame
B.7 Representing Power in DQ Frame
Appendix C: System Modeling Using Complex Numbers and Phasors
Appendix D: Simulink Examples
D.1 Chapter 3 Examples
D.2 Chapter 5 Examples
D.3 Chapter 6 Examples
D.4 Chapter 8 Examples
D.5 Chapter 14 Examples
D.6 Chapter 16 Examples
D.7 Chapter 17 Examples
Index
End User License Agreement
List of Tables
Chapter 1
Table 1.1 DC cables types for underground and submarine applications.
Chapter 3
Table 3.1 Variables during the commutation period.
Chapter 7
Table 7.1 Rectifier AC system eigenvalues (in rotating DQ frame).
Table 7.2 Inverter AC system eigenvalues (in rotating DQ frame).
Table 7.3 Typical DC line and cable data.
Table 7.4 Controller parameters for CIGRE benchmark HVDC system.
Table 7.5 Dominant eigenvalues for the CIGRE HVDC benchmark model.
Chapter 8
Table 8.1 HVDC test system for fundamental frequency studies.
Chapter 9
Table 9.1 SCR classification.
Table 9.2 Dominant CIGRE HVDC eigenvalues with reduced SCR.
Table 9.3 SVC parameters in the test case.
Table 9.4 Typical values for inertia constants.
Chapter 11
Table 11.1 IEEE Standard 519 harmonic limits.
Table 11.2 IEC Standard 61000 3‐6 harmonic limits.
Chapter 12
Table 12.1 Comparison between different HVDC technologies.
Table 12.2 Examples of the VSC HVDC transmission systems based on the two‐level ...
Table 12.3 Examples of the VSC HVDC transmission systems based on the NPC conver...
Table 12.4 Examples of the VSC HVDC transmission systems based on half‐bridge MM...
Table 12.5 Examples of the VSC HVDC transmission systems based on FB MMC convert...
Chapter 13
Table 13.1 IGBT/IGCT devices ratings for high voltage high current applications.
Chapter 14
Table 14.1 Conducting switches in case of resistive load, for 180° conduction.
Table 14.2 Conducting switches in case of inductive load with 180° conduction.
Table 14.3 Comparison between 120° and 180° modulation.
Chapter 15
Table 15.1 Conduction paths in one leg of a conventional two‐level inverter.
Table 15.2 Magnitude of harmonics on line‐line voltage in per cent relative to f...
Chapter 16
Table 16.1 Operation of a HB cell.
Table 16.2 Redundant switching states effect on capacitor voltages for a three‐l...
Table 16.3 THD of AC voltages for MMC of different levels.
Table 16.4 Operation of a FB cell.
Table 16.5 Summary of multilevel inverter topologies in HVDC applications.
Chapter 18
Table 18.1 Test system parameters.
Table 18.2 System variables for different design points (
S
g
=
1000 MVA,
V
g
...
Chapter 19
Table 19.1 Cell charging for HVDC start‐up in Figures 19.6 and 20.4.
Table 19.2 MMC converter test system data and comparison with 2‐level VSC.
Chapter 22
Table 22.1 High‐power IGBT data of relevance for protection.
Chapter 24
Table 24.1 Estimated costs of DC grid components.
Chapter 26
Table 26.1 Terminal voltages and currents in Example 26.1.
Table 26.2 HVDC grid currents in Example 26.1.
Table 26.3 AC system parameters in Example 26.2.
Chapter 27
Table 27.1 Terminal voltages and currents in Example 27.1a (with balanced case).
Table 27.2 Terminal voltages and currents in Example 27.1b (when
P
4ref
= 221210...
Table 27.3 Terminal voltages and currents in Example 27.1c (when terminal 1 is t...
Table 27.4 Terminal voltages and currents in Example 27.1d (when cable 12 is tri...
Table 27.5 Terminal voltages and currents in Example 27.1e (when cables 12 and 1...
Table 27.6 Terminal voltages and currents in Example 27.2a (with balanced case).
Table 27.7 Terminal voltages and currents in Example 27.2b (when
P
4ref
= −100 M...
Table 27.8 Terminal voltages and currents in Example 27.2c (when terminal 1 is t...
Table 27.9 Terminal voltages and currents in Example 27.2d (when cable 12 is tri...
Table 27.10 Terminal voltages and currents in Example 27.2e (when cables 12 and ...
Table 27.11 Power reference values for the CIGRE DC grid.
Chapter 28
Table 28.1 Arrester characteristic as a simple 10‐point
I–V
curve.
Table 28.2 Parameters of the simulated 400 kV mechanical DC CB.
Table 28.3 Parameters of the simulated 400 kV hybrid DC CB.
Table 28.4 Functionality of unidirectional and bidirectional hybrid DC CB.
Chapter 29
Table 29.1 DC fault current contribution through AC/DC converter.
Table 29.2 DC fault current at each terminal in Example 29.1.
Table 29.3 Key performance indicators for all faults on DC grid shown in Figure ...
Chapter 30
Table 30.1 Basic data for the IGBT switch in Example 30.2.
Table 30.2 Parameters for the non‐isolated 320 kV/250 kV, 600 MW DC/DC test syst...
Table 30.3 Parameters for the isolated ±320 kV/±250 kV, 600 MW, DC/DC test syste...
Table 30.4 Comparison of North Sea DC grid with hubs and with DC/DC converters.
1
Table A.1 Notation systems for two variables.
List of Illustrations
Chapter 1
Figure 1.1 HVDC and HVAC transmission cost comparison.
Figure 1.2 Terminal station of Moyle HVDC interconnector (bipole 2 × 250 M...
Figure 1.3 Typical HVDC schematic (12‐pulse monopole with metallic return)...
Figure 1.4 Twelve‐pulse monopolar HVDC with ground return.
Figure 1.5 Bipolar HVDC (12‐pulse) with ground return.
Figure 1.6 Back‐to‐back HVDC topology.
Figure 1.7 Breakdown of typical LCC HVDC station losses at 1 p.u. power.
Figure 1.8 Variation of HVDC station losses with DC power, shown relative ...
Figure 1.9 Options for conversion of three‐phase AC lines into DC.
Chapter 2
Figure 2.1 Structure and symbol for thyristor and diode.
Figure 2.2 Thyristor operating curves.
Figure 2.3 High‐power thyristors of press‐pack design.
Figure 2.4 Thyristor switching characteristic.
Figure 2.5 Thyristor in a single‐phase half‐wave converter. Firing angle is 40...
Figure 2.6 Thyristor in a single‐phase half‐wave converter with resistive load...
Figure 2.7 Typical on‐state characteristic for a high‐power thyristor.
Figure 2.8 Thyristor turning OFF.
Figure 2.9 Test thyristor ON‐state and turn ON/OFF energy curves.
Figure 2.10 Thyristor valve structure and protection for d
v
/d
t
and d
i
/d
t
.
Figure 2.11 Thyristor valve rack assembly.
Figure 2.12 Thyristor valve hall at Yunnan–Guangdong HVDC station.
Chapter 3
Figure 3.1 Diode six‐pulse AC/DC converter.
Figure 3.2 Three‐phase diode bridge plots.
Figure 3.3 Thyristor six‐pulse AC/DC converter with a transformer.
Figure 3.4 Thyristor six‐pulse AC/DC converter with transformer (
L
t
= 0.1 H) a...
Figure 3.5 Converter equivalent circuit during commutation.
Figure 3.6 Commutation from valve
T
1
to
T
3
(phase A to phase B) in rectificati...
Figure 3.7 Commutation angle as the function of operating angle in Example 3.1...
Figure 3.8 Thyristor converter DC voltage as a function of firing angle.
Figure 3.9 Commutation from valve
T
1
to
T
3
(phase A to B) in inversion mode.
Figure 3.10 Gamma angle for a range of thyristor turn‐off times in Example 3.2...
Chapter 4
Figure 4.1 Rectifier controller.
Figure 4.2 Transvector PLL.
Figure 4.3 Influence of AC system dynamics on the converter firing angle. (a) ...
Figure 4.4 Master‐level HVDC controls at rectifier.
Chapter 5
Figure 5.1 Inverter controller schematic.
Figure 5.2 Inverter commutation failure simulation.
Figure 5.3 DC current path after commutation failure.
Chapter 6
Figure 6.1 HVDC system equivalent electrical circuit. (a) Inverter in constant...
Figure 6.2 HVDC operating point as an intersection between rectifier and inver...
Figure 6.3 HVDC full
V–I
operating diagram (inverter in
V
dc
control mode...
Figure 6.4 HVDC operating point for reduced rectifier AC voltage (inverter in ...
Figure 6.5 HVDC operating point for reduced inverter AC voltage (inverter in C...
Figure 6.6 HVDC test system.
Figure 6.7 HVDC power reversal process. At 1.1 s the current margin is removed...
Figure 6.8 HVDC
V–I
diagram with positive and negative power direction.
Figure 6.9 HVDC system in Example 6.1.
Chapter 7
Figure 7.1 HVDC dynamic model schematic.
Figure 7.2 CIGRE HVDC benchmark model, 1 GW, 500 kV (rectifier short circuit r...
Figure 7.3 Test system in Example 7.1.
Figure 7.4 DC controller step response for two different operating points (
V
dc
Figure 7.5 Block diagram for the system in Example 7.1 with gain scheduling co...
Figure 7.6 Rectifier AC system ABC frame model frequency response (SCR = 2.5, ...
Figure 7.7 Inverter AC system ABC frame model frequency response (SCR = 2.5, 7...
Figure 7.8 Transformer model.
Figure 7.9 DC side model, including smoothing reactors and DC cable.
Figure 7.10 DC system frequency response for HVDC CIGRE benchmark.
Figure 7.11 DC cable cross‐section.
Figure 7.12 DC cable representation.
Figure 7.13 400 kV, 2 kA DC cable geometry in Example 7.2.
Figure 7.14 DC cable per unit series impedance as the function of frequency in...
Figure 7.15 Comparison of frequency responses of three DC cable models in Exam...
Figure 7.16 DC cable model with fixed parameters consisting of five parallel b...
Figure 7.17 DC cable model with fixed parameters consisting of a single
π
Figure 7.18 Verification of the small‐signal LCC HVDC model.
Figure 7.19 Eigenvalue locus as rectifier PLL gains are increased twofold (◊ s...
Figure 7.20 Eigenvalue locus as inverter PLL gains are increased fourfold (◊ s...
Figure 7.21 Eigenvalue movement as the rectifier controller proportional gain ...
Figure 7.22 Second harmonic instability simulation, obtained on CIGRE benchmar...
Chapter 8
Figure 8.1 LCC HVDC converter connection with AC system. (a) Equivalent diagra...
Figure 8.2 Phasor diagram of AC system connected to inverter.
Figure 8.3 Interaction between inverter DC and AC system for DC current increa...
Figure 8.4 Interaction between DC and AC systems for two different
γ
angl...
Figure 8.5 Impact of shunt reactive power compensation for two different
X
/
R
r...
Figure 8.6 Impact of load at inverter AC bus. CEA mode.
Figure 8.7 Interaction between inverter DC and AC system as DC current increas...
Figure 8.8 Interaction between rectifier DC and AC system for firing angle cha...
Chapter 9
Figure 9.1 System in Example 9.1.
Figure 9.2 AC system and converter as a current source for phasor interaction ...
Figure 9.3 Maximum power transfer between an AC system and an LCC converter.
Figure 9.4 Maximum power transfer between an AC system and an LCC converter, a...
Figure 9.5 Maximum power transfer between an AC system and an LCC converter, a...
Figure 9.6 Interaction between converter DC and AC system for various AC grid ...
Figure 9.7 Synchronous condensers and SVC as solutions for HVDC with weak AC s...
Figure 9.8 Impact of SVC at HVDC inverter terminal with weak AC system (SCR = ...
Figure 9.9 Impact of placing SVC at the HVDC rectifier terminal with a weak AC...
Figure 9.10 PQ diagram of 500 MW HVDC with a −250/+100 MVAr SVC (SCR = 4).
Figure 9.11 HVDC with capacitor commutated converter.
Figure 9.12 Equivalent circuit for systems with low inertia.
Chapter 10
Figure 10.1 Fault locations and protective means with HVDC systems.
Figure 10.2 HVDC system response to a DC fault at 0.45 s. The fault is cleared...
Figure 10.3 Steady‐state DC voltage profile for DC faults and effect of DC fau...
Figure 10.4 HVDC
V–I
diagram with VDCOL.
Figure 10.5 HVDC commutation failure recovery (after a 20% AC voltage drop for...
Figure 10.6 Arrangement of DC circuit breakers for system protection and recon...
Figure 10.7 DC circuit breakers on Yunnan–Guangdong HVDC.
Figure 10.8 Location of surge arresters at an HVDC station.
Figure 10.9 Surge arrester on Yunnan–Guangdong HVDC.
Chapter 11
Figure 11.1 HVDC station with harmonic filters.
Figure 11.2 AC filters at Moyle HVDC station (2001).
Figure 11.3 Tuned filter at HVDC terminal.
Figure 11.4 Bode plot for 11th harmonic tuned filter with two different values...
Figure 11.5 Second‐order damped filter at HVDC terminals.
Figure 11.6 Bode plot for 24th harmonic high‐pass filter with two different va...
Figure 11.7 HVDC system in Example 11.1.
Figure 11.8 HVDC supplementary control for DC harmonic elimination.
Chapter 12
Figure 12.1 Symmetrical monopolar VSC HVDC transmission system based on tw...
Figure 12.2 Polymeric insulated cable for HVDC.
Figure 12.3 One phase of a VSC HVDC station based on the two‐level convert...
Figure 12.4 One phase of the VSC HVDC station based on an NPC converter.
Figure 12.5 One phase of an
n
+ 1 level MMC HVDC converter.
Figure 12.6 Valve hall of 500 kV Skagerrak 4 MMC HVDC.
Figure 12.7 Terminology and symbols for two‐level VSC converters.
Figure 12.8 Terminology and symbols for half‐bridge VSC converters.
Figure 12.9 Terminology and symbols for FB VSC converters.
Figure 12.10 Half‐bridge MMC cell designs.
Figure 12.11 On‐shore MMC converter station for HelWin1,2 and SylWin1,2....
Figure 12.12 Solenoid air‐core inductor.
Chapter 13
Figure 13.1 IGBT circuit symbol.
Figure 13.2 Press‐pack IGBT (on left) and IGBT modules (on right) for high‐pow...
Figure 13.3 Shape of fulll output characteristic of the IGBT.
Figure 13.4 Characteristics for a typical high‐power (6.5 kV/750 A) IGBT: (a) ...
Figure 13.5 Switching waveforms of the IGBT gate–emitter voltage, collector–em...
Figure 13.6 Switching energy characteristics for the test IGBT.
Figure 13.7 Reverse recovery energy characteristics for the anti‐parallel diod...
Figure 13.8 VSC converter variables in Example 13.1; (a) 2‐level 3‐phase conve...
Figure 13.9 VSC with resistor‐capacitor‐diode voltage clamp snubbers for d
v/
d
t
Figure 13.10 Testing VSC HVDC valves on BorWin1 project. Reproduced with permi...
Chapter 14
Figure 14.1 A single‐phase VSC converter.
Figure 14.2 Single‐phase VSC converter waveforms with inductive AC load.
Figure 14.3 Two‐level converter topologies: (a) three‐legged conventional conv...
Figure 14.4 Switch firing signals for 180° conduction modulation method.
Figure 14.5 Two‐level three‐phase converter line‐to‐line voltages for 180° con...
Figure 14.6 Two‐level three‐phase converter line‐to‐neutral voltages for 180° ...
Figure 14.7 Two‐level three‐phase converter currents for 180° conduction with ...
Figure 14.8 Two‐level three‐phase converter currents assuming 180° conduction ...
Figure 14.9 Switch firing signals for 120° conduction modulation.
Figure 14.10 Line‐to‐line and line‐to‐load neutral voltages for one phase with...
Chapter 15
Figure 15.1 Converter modulation techniques.
Figure 15.2 Time domain traces and frequency scan of AC signal of a converter ...
Figure 15.3 Modulating signal classification.
Figure 15.4 Three‐phase two‐level converter with gate signal generators for SP...
Figure 15.5 SPWM control signals, gate signals and AC voltage
V
a0
for phase
a
.
Figure 15.6 Modulating signal with third harmonic injection.
Figure 15.7 SPWM VSC modulation and AC voltage, assuming frequency modulation ...
Figure 15.8 Spectra analysis: (a) phase‐to‐floating neutral voltage spectrum; ...
Figure 15.9 Performance comparison for different modulation techniques: (a) fu...
Chapter 16
Figure 16.1 One phase leg of a voltage‐source converter with: (a) two leve...
Figure 16.2 Multilevel converter modulation techniques.
Figure 16.3 Three‐level diode clamped converter.
Figure 16.4 The pole, line‐to‐line and line‐to‐load neutral voltages of ph...
Figure 16.5 Phase a of three‐level HB modular converter.
Figure 16.6 Half‐bridge MMC cell.
Figure 16.7 Capacitor voltage balancing for an 11‐level HB MMC. Top graph:...
Figure 16.8 Arm inductance value which causes resonance at second and four...
Figure 16.9 Arm inductors at Trans Bay MMC HVDC station.
Figure 16.10 The phase 0 voltage of phase ‘
a
’ for a nine‐level modular mul...
Figure 16.11 A typical AC reference and actual converter AC voltage of a n...
Figure 16.12 The phase‐to‐zero, line‐to‐line, and line‐to‐load neutral vol...
Figure 16.13 The phase‐to‐zero, line‐to‐line, and line‐to‐load neutral vol...
Figure 16.14 One phase of a three‐level FB modular converter.
Figure 16.15 Full‐bridge MMC cell.
Chapter 17
Figure 17.1 Implementation of the average two‐level VSC model in the ABC frame...
Figure 17.2 DC current comparison between the detailed model and the average V...
Figure 17.3 AC voltage
V
aN
comparison of the detailed model and the average VS...
Figure 17.4 Equivalent circuit of a blocked two‐level VSC (VSC diode bridge).
Figure 17.5 Average value two‐level VSC model in the ABC frame, including bloc...
Figure 17.6 Converter control signal vector representation.
Figure 17.7 VSC with local AC grid.
Figure 17.8 Block diagram of the inner current feedback loops assuming ideal d...
Figure 17.9 Step responses of the inner control loops on a detailed model:
i
gq
...
Figure 17.10 Designing outer AC voltage controller.
Figure 17.11 Designing outer power controller.
Figure 17.12 Designing outer DC voltage controller.
Figure 17.13 Two‐level VSC controller with inner and outer control loops.
Figure 17.14 Verification of small signal linearised VSC HVDC model.
Figure 17.15 VSC HVDC system dynamics with reduction in SCR (2 < SCR < 40).
Figure 17.16 VSC HVDC system dynamics with change in PLL gains (0.1 <
k
cPLL
< ...
Figure 17.17 VSC HVDC system dynamics with reduced SCR (2 < SCR < 40), using i...
Chapter 18
Figure 18.1 Test system for studying power exchange between two AC voltage sou...
Figure 18.2 Power exchange between two AC voltage sources assuming the
V
s
=
V
g
Figure 18.3 Power exchange between two AC voltage sources assuming that the cu...
Figure 18.4 Two‐level VSC converter connected to an AC grid for phasor interac...
Figure 18.5 VSC converter operating limits: SCR = 10,
X
/
R
= 20,
X
t
= 0.2 p.u.
Figure 18.6 VSC operating limits for different design points: SCR = 10,
X
/
R
= ...
Figure 18.7 VSC operating limits for variable SCR;
X
/
R
= 10,
X
t
= 0.2 p.u.
Figure 18.8 VSC operating limits for variable
X
/
R
; SCR = 10,
X
t
= 0.2 p.u.
Figure 18.9 VSC operating limits for variable
X
t
; SCR = 10,
X
/
R
= 10.
Figure 18.10 VSC operating diagrams in different control modes; SCR = 10,
X
/
R
...
Figure 18.11 VSC converter operating diagrams in different control modes with ...
Figure 18.12 VSC HVDC terminal in Example 18.1.
Figure 18.13 Phasor diagram in Example 18.3.
Chapter 19
Figure 19.1 One phase of an
n
+ 1 level modular multilevel converter.
Figure 19.2 MMC converter basic variables. Circulating current control is not ...
Figure 19.3 One phase of an average value non‐linear dynamic model for MMC con...
Figure 19.4 Equivalent circuit of a blocked HB MMC.
Figure 19.5 HB MMC average model including blocked state.
Figure 19.6 MMC HVDC system staged start‐up showing cell charging from AC and ...
Figure 19.7 Second harmonic circulating current vs. arm inductance.
Figure 19.8 Second‐harmonic CCSC.
Figure 19.9 Activation of second‐harmonic CCSC at 2 s.
Figure 19.10 MMC phasor model using equivalent series capacitor
C
MMC
.
Figure 19.11 MMC simple average dynamic model using equivalent series capacito...
Figure 19.12 Verification of MMC models with series capacitor
C
MMC
.
Figure 19.13 Verification of MMC 10th‐order dynamic analytical model for a 5% ...
Figure 19.14 HB MMC converter controller structure.
Figure 19.15 Comparison of MMC VSC and two‐level VSC converter utilisation rat...
Figure 19.16 Arm reactance
X
armpu
and MMC capacitive reactance
X
MMCpu
as the f...
Figure 19.17 MMC VSC PQ diagram and comparison with two‐level VSC (SCR = 2,
X
/
Chapter 20
Figure 20.1 One phase of average value non‐linear dynamic model for FB MMC con...
Figure 20.2 Equivalent circuit of a blocked FB MMC.
Figure 20.3 FB MMC average value model including blocked state.
Figure 20.4 FB MMC HVDC system start‐up showing cell charging.
Figure 20.5 Hybrid MMC converter.
Figure 20.6 Required arm voltage capacity (number of arm cells in p.u.) for gi...
Figure 20.7 Required number of FB cells in p.u. for given
k
MMC
, and for a rang...
Figure 20.8 Converter AC voltage and arm voltages in Example 20.1 (
V
dc
= 640 k...
Figure 20.9 FB MMC test system.
Figure 20.10 Testing 21‐level FB MMC for DC voltage magnitude and polarity cha...
Figure 20.11 FB MMC converter controller.
Figure 20.12 FB MMC HVDC response to step inputs on power and DC voltage refer...
Chapter 21
Figure 21.1 Complete MMC controller including balancing controls.
Figure 21.2 Controller for phase balancing (horizontal balancing).
Figure 21.3 Equivalent circuit and controller for balancing arms in phases (ve...
Figure 21.4 Demonstration of MMC balancing controls for internal MMC parameter...
Figure 21.5 MMC HVDC system response for a 200 ms, two‐phase AC fault. No bala...
Figure 21.6 Demonstration of MMC balancing controls for a 200 ms two‐phase AC ...
Figure 21.7 Calculation of positive and negative sequence DQ0 current componen...
Figure 21.8 AC voltage and current positive and negative sequence components f...
Figure 21.9 Grid current controller for positive and negative sequence current...
Chapter 22
Figure 22.1 VSC HVDC transmission system with location for AC and DC faults.
Figure 22.2 VSC HVDC inverter response to a 60 ms three‐phase AC fault at PCC.
Figure 22.3 VSC converter under a DC fault, showing the fault current path for...
Figure 22.4 VSC converter variables for a permanent DC fault at converter term...
Figure 22.5 Influence of DC inductor
L
d
on the diode fault current.
Figure 22.6 VSC diode bridge AC voltage (line‐to‐line) and DC voltage under a ...
Figure 22.7 VSC diode bridge average model verification for a DC fault.
Figure 22.8 VSC diode bridge DC currents as DC voltage is reducing, with
X
t
an...
Figure 22.9 VSC HVDC terminal in Example 22.1.
Figure 22.10 VSC converter DC fault current (in p.u. relative to nominal DC cu...
Figure 22.11 VSC converter mode transitions as the DC voltage is reducing (cur...
Figure 22.12 One phase of an HB MMC during DC fault.
Figure 22.13 Simulation of a remote (at 300 km) DC fault with an HB MMC.
Figure 22.14 Simulation of a 200 ms DC fault with full bridge MMC HVDC (no con...
Figure 22.15 Simulation of a DC fault with full bridge MMC HVDC, assuming bloc...
Chapter 23
Figure 23.1 VSC HVDC embedded in an AC grid.
Figure 23.2 VSC HVDC connecting two separate AC systems.
Figure 23.3 VSC HVDC in parallel with an AC interconnector.
Figure 23.4 VSC HVDC converter connected to a passive AC grid.
Figure 23.5 Offshore platform for Borwin 1 HVDC (2012).
Figure 23.6 HVDC connecting offshore wind farm with an onshore AC grid.
Figure 23.7 HVDC driving a MW‐size variable speed motor.
Chapter 25
Figure 25.1 Four‐terminal LCC HVDC in parallel and series connection.
Figure 25.2 Italy–Sardinia HVDC with Corsica tap.
Figure 25.3 Connecting thyristor converter to a DC grid using mechanical switc...
Figure 25.4 Connecting thyristor converter with bidirectional valves to a DC g...
Figure 25.5 Connecting thyristor converter to a DC grid using a DC/DC converte...
Figure 25.6 Control schematic for LCC converter in DC grids.
Figure 25.7 Steady‐state
V–I
characteristics of a four‐terminal LCC‐base...
Figure 25.8 A four‐terminal DC grid with LCC converters.
Chapter 26
Figure 26.1 Voltage source converter (VSC) converter connected to DC grid.
Figure 26.2 Zhoushan five‐terminal VSC HVDC.
Figure 26.3 Nan'ao three‐terminal VSC HVDC.
Figure 26.4 A five‐node HVDC grid with VSC converters.
Figure 26.5 Iterative algorithm for calculating grid power flow under DC fault...
Figure 26.6 Power flow in five‐node HVDC grid under DC fault at cable 34 in Ex...
Chapter 27
Figure 27.1 DC grid control structure.
Figure 27.2 VSC converter controller as part of DC grid control.
Figure 27.3 Transpower HVDC control centre in New Zealand. Reproduced with...
Figure 27.4 VSC converter controller with three levels.
Figure 27.5 Dispatcher controller when VSC converters use three‐level cont...
Figure 27.6 CIGRE DC grid benchmark with nominal power flow.
Figure 27.7 CIGRE DC grid benchmark after terminal Cb‐A1 outage, assuming ...
Figure 27.8 CIGRE DC grid benchmark DC voltages after terminal Cb‐A1 outag...
Figure 27.9 CIGRE DC grid benchmark average DC voltages after terminal Cb‐...
Chapter 28
Figure 28.1 DC CB operating principle and simple model.
Figure 28.2 Mechanical DC CB.
Figure 28.3 Selection of parameters for a mechanical DC CB, assuming
V
dc
= 400...
Figure 28.4 Prospective currents in a mechanical DC CB, assuming that CB
1
rema...
Figure 28.5 DC CB test circuit.
Figure 28.6 Simulation of fault current interruption (positive current) with m...
Figure 28.7 Simulation of fault current interruption (negative current) with m...
Figure 28.8 Mechanical DC CB for multiple operations in short time.
Figure 28.9 Mechanical DC CB for 400 kV.
Figure 28.10 An 80 kV, 16 kA, pre‐prototype mechanical DC CB with active curre...
Figure 28.11 Semiconductor‐based DC CB.
Figure 28.12 Response of a semiconductor DC CB.
Figure 28.13 One‐cell hybrid DC CB for bidirectional protection.
Figure 28.14 A five cell 400 kV, hybrid DC CB, for unidirectional protection.
Figure 28.15 Response of hybrid DC CB;
T
op
= 2 ms.
Figure 28.16 Controller for hybrid DC CB fault current limiting.
Figure 28.17 Fault current limiting with hybrid DC CB (
V
dc
= 400 kV,
I
dc
= 2 k...
Chapter 29
Figure 29.1 Six‐node DC grid in Example 29.1.
Figure 29.2 Operating timeframe for AC and DC system protection.
Figure 29.3 Protection system for a four‐terminal meshed DC grid.
Figure 29.4 Fault currents in four sensors located at different places on a 60...
Figure 29.5 ROCOV measurement and protection logic.
Figure 29.6 Three‐terminal, 400 kV DC grid for illustration of ROCOV protectio...
Figure 29.7 Peak value of voltage derivative
D
Vdc
vs. DC CB series inductance ...
Figure 29.8 Peak value of voltage derivative
D
Vdc
vs. DC CB series inductance ...
Figure 29.9 Peak MMC DC current for a worst case DC fault, vs. inductor size. ...
Figure 29.10 Control logic for temporary blocking MMC.
Figure 29.11 ROCOV protection operation with temporary MMC blocking for a faul...
Figure 29.12 Differential protection system for the DC line 34.
Figure 29.13 Communication and wave delays with DC line differential protectio...
Figure 29.14 Protection system for a four‐terminal star‐connected DC grid.
Figure 29.15 Four‐terminal DC grid with DC fault‐tolerant VSCs.
Figure 29.16
L
VSC converter.
Figure 29.17 Converter utilisation ratio and per unit fault currents as the fu...
Figure 29.18 LCL VSC converter.
Figure 29.19 LCL converter DC fault current (p.u.) and capacitor voltage (p.u....
Figure 29.20 VSC converter with a DC CB operating as a fault current limiter.
Figure 29.21 Four‐terminal DC grid with all FB MMC converters and mechanical D...
Figure 29.22 Response of four‐terminal DC grid with all FB MMC converters for ...
Chapter 30
Figure 30.1 Applications of power flow controlling device in DC grids.
Figure 30.2 The series resistance value and total resistor loss depending on t...
Figure 30.3 Power flow controlling device based on
n
series resistors.
Figure 30.4 Topology of bipolar DC/DC converter connecting DC grid 1 and DC gr...
Figure 30.5 Controller for bipolar low stepping ratio DC/DC converter.
Figure 30.6 Demonstration of bipolar DC/DC converter operation in
V
dc2
control...
Figure 30.7 Averaged continuous model of bidirectional DC/DC converter.
Figure 30.8 H‐Bridge monopolar DC/DC chopper.
Figure 30.9 Non‐isolated, MMC‐based DC/DC converter.
Figure 30.10 Equivalent circuit for non‐isolated, MMC‐based DC/DC converter.
Figure 30.11 Valve DC power and maximum possible AC power assuming
V
H
M
=
V
L
M
=...
Figure 30.12 MMC DC/DC design for a range of
V
dc2
.
P
= 600 MW,
V
dc1
= 320 kV,
Figure 30.13 MMC DC/DC design as the function of arm inductance.
P
= 600 MW,
V
Figure 30.14 Controller for MMC‐based DC/DC converter.
Figure 30.15 Steady‐state variables for non‐isolated, MMC‐based DC/DC converte...
Figure 30.16 Simulation responses for non‐isolated, MMC‐based DC/DC converter.
Figure 30.17 DC/DC converter enabling DC voltage polarity reversal at LV side ...
Figure 30.18 Dual active bridge DC/DC converter with internal AC transformer (...
Figure 30.19 Controller for dual active bridge DC/DC converter with internal A...
Figure 30.20 Dual active bridge DC/DC converter response.
Figure 30.21 Symmetrical monopole, LCL IGBT‐based DC/DC converter.
Figure 30.22 A VSC HVDC link with third terminal interfaced using DC/DC conver...
Figure 30.23 Twenty‐one‐terminal DC grid with three star points and three DC/D...
Figure 30.24
N
‐Port, two‐phase DC hub.
Figure 30.25 DC grid with 10 terminals and one DC hub.
Figure 30.26 North Sea DC grid schematic with four DC hubs.
Figure 30.27 North Sea DC grid schematic with four DC busses and DC/DC convert...
Guide
Cover
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High Voltage Direct Current Transmission
Converters, Systems and DC Grids
Dragan Jovcic
University of AberdeenAberdeen, UK
Second Edition
Copyright
This edition first published 2019
© 2019 John Wiley & Sons Ltd
Edition History
John Wiley & Sons (1e, 2015)
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Library of Congress Cataloging‐in‐Publication Data Applied for
ISBN: 9781119566540
Cover Design: Wiley
Cover Image: Cover page photograph reproduced with permission of SIEMENS – HVDC Project Brazil
Preface
At the time of writing this book there are over 200 high voltage direct current (HVDC) links installed worldwide. The largest installations operate at ±800 kV DC voltage while the highest DC current ratings are over 4500 A. Although alternating current was the predominant method for transmitting electrical energy during the twentieth century, HVDC has now been demonstrated to be the best solution for many specific application areas and the number of installations per year is constantly increasing at the beginning of the twenty‐first century. Despite significant converter station costs, HVDC is techno‐economically preferred in many general applications:
long‐distance large‐scale power transfer;
subsea and long‐distance cable power transmission;
interconnecting asynchronous AC systems, or systems with different frequencies;
controllable power transfer between different nodes in an electricity market or markets;
AC grid stability support, ancillary service provision, and resilience from blackouts;
connecting isolated systems like offshore wind farms or oil platforms.
DC transmission technology was used in many instances in the very early power systems, but the modern HVDC transmission began with the 1954 Sweden–Gotland installation. This system, and all of the other HVDCs commissioned until the mid 1970s, was based on mercury arc valves. Significant technical advance came with the introduction of solid‐state valves (thyristors) although they only support the line commutated converter concept. In the first decade of the twenty‐first century there has been very rapid development of fundamentally new technologies and increasing demand for HVDC technology. The introduction of voltage source converters (VSCs) requires new valves that utilise insulated gate bipolar transistors and also new protection and control approaches. The modular multilevel converters have eventually emerged as the most cost‐effective VSC converter concept which practically eliminates filtering needs with HVDC and removes voltage limits with VSC valves. Modular multilevel converter HVDC nowadays has low losses which are comparable with those of thyristor HVDC and new technologies are emerging that open up possibilities for wider application areas.
In the second decade of the twenty‐first century, it has become apparent that DC transmission grids are both a viable solution to large‐scale energy challenges and technically feasible. The primary application drivers are coming from the initiatives like the NorthSea DC grid, Medtech, Desertec, European Overlay Supergrid and various projects in China, where two multiterminal VSC HVDC systems are already operating. It is accepted that the DC transmission grids will have similar or better levels of reliability and technical performance to the AC transmission system. This level of performance, security and reliability is technically feasible, although in many aspects DC grids will be substantially different from traditional AC systems. The development of DC grids brings significant technical advances in HVDC technologies, in particular related to DC CB (circuit breakers), DC/DC converters and DC protection systems, and substantial further research and development is anticipated.
Nowadays HVDC and DC grids are associated with green energy, as facilitators of large‐scale renewable energy plants. This helps with the public acceptance and image, and facilitates further investments in large public projects. Also HVDC is perceived as a technology that avoids pylons, by using long underground cables, which further strengthens arguments for future funding decisions.
The timing of this book is, therefore, in step with accelerated interest in HVDC and projected significant increase and expansion in applications. The book is organised into three parts in order to study all three major HVDC concepts and current research developments: line commutated HVDC, VSC HVDC and DC grids including current research developments. Each part will review theoretical concepts first and analyse aspects of technology, interaction with AC grids, modelling, control, faults and protection with particular emphasis on practical implementation aspects and reported operational issues. The technology described in the first two parts is largely based on the operating HVDC systems, while the topic of DC grids is grounded in the significant volume of research at many institutions.
The technical field of HVDC transmission and DC grids straddles three major traditional electrical engineering disciplines:
Power transmission engineering
– the impact of HVDC systems on the connecting AC transmission systems and the national grids is of primary importance. The influence of AC systems on HVDC is also of significance in terms of technical performance, stability, protection and power transfer security in general. The harmonic interaction will be studied in some depth.
Power electronics
– each HVDC link involves at least two AC/DC converters while DC grids will have many more including semiconductor DC CBs and DC/DC converters. These converters have similar features to the traditional low‐power converters but many other unique requirements exist to develop valves and converter assemblies capable of sustaining up to 800 kV and perhaps over 4500 A. The protection of valves and converters is very important and defining power electronics feature in HVDC.
Control engineering
– modelling and simulation of HVDC is essential for design and operation and several different modelling approaches exist depending on the model application. In particular, because of high costs of HVDC testing and the consequences of any design issues, model accuracy and simulation speed play a crucial role in the system design. The control systems for HVDC have evolved into very complex technologies which are always multivariable and non‐linear with multiple control layers.
The above three technical disciplines will be employed in this book in order to analyse all of the essential technical aspects of HVDC and DC grids, aiming to facilitate learning by researchers and engineers interested in this field.
The material in this book includes contributions from many HVDC researchers and engineers, and it is developed from research projects funded by several research councils and private firms. More importantly, the studies are inspired and built on previous work by numerous HVDC engineers and researchers.
The author would like to express gratitude to Dr Khaled Ahmed for signification contribution to the first edition of this manuscript, which has served as the basis for the second edition. The author is particularly thankful to ALSTOM Grid, UK, for making their comprehensive report ‘HVDC Connecting to the future’ available to the authors, as well as to Siemens, Germany, and ABB, Sweden, for their HVDC photographs. I am also indebted to all of the researchers at the University of Aberdeen HVDC research centre and in particular to Dr. Weixing Lin, Dr. Ali Jamshidifar, Dr. Masood Hajian, Dr. Huibin Zhang, Mr. Stefan Kovacevic, and Dr. Lu Zhang for their contributions.
Special thanks are reserved for SSE, Scotland, and, in particular, to Andrew Robertson, for their support of the HVDC course at the University of Aberdeen, which provided substantial material for this book.
The author is further grateful to the following organisations, which have supported related research studies at the University of Aberdeen:
EPSRC (Engineering and Physical Sciences Research Council) UK;
ERC (European Research Council), FP 7 Ideas program;
RTE (Réseau de Transport d'Électricité), France;
EU Horizon2020.
January 2019
Dragan Jovcic
Part IHVDC with Current Source Converters
1Introduction to Line Commutated HVDC
1.1 HVDC Applications
Thyristor‐based high voltage direct current (HVDC) transmission has found application in more than 150 point‐to‐point worldwide installations, and in each case has proven to be technologically and/or economically superior to alternating current (AC) transmission. Typical HVDC applications can be grouped as follows:
Submarine power transmission
. AC cables have large capacitance and for cables over 40–70 km the reactive power circulation becomes unacceptable. This distance can be extended somewhat with reactive power compensation. For larger distances HVDC is more economical. A good example is the 580 km, 700 MW, ±450 kV NorNed HVDC between Norway and The Netherlands.
Long‐distance overhead lines
. Long AC lines require variable reactive power compensation. Typically 600–800 km is breakeven distance, and for longer distances HVDC is more economical. A good example is the 1360 km, 3.1 GW, ±500 kV Pacific DC intertie along the west cost of the USA.
Interconnecting two AC networks of different frequencies
. A good example is the 500 MW, ±79 kV back‐to‐back Melo HVDC between Uruguay and Brazil. The Uruguay system operates at 50 Hz whereas the Brazil national grid runs at 60 Hz.
Interconnecting two unsynchronised AC grids
. If the phase difference between two AC systems is large they cannot be directly connected. A typical example is the 150 MW, ±42 kV McNeill back‐to‐back HVDC link between Alberta and Saskatchewan interconnecting asynchronous eastern and western American systems.
Controllable power exchange between two AC networks (for trading)
