Lead-free Soldering Process Development and Reliability E-Book
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- Herausgeber: John Wiley & Sons
- Kategorie: Wissenschaft und neue Technologien
- Serie: Wiley Series in Quality and Reliability Engineering
- Sprache: Englisch
Covering the major topics in lead-free soldering Lead-free Soldering Process Development and Reliability provides a comprehensive discussion of all modern topics in lead-free soldering. Perfect for process, quality, failure analysis and reliability engineers in production industries, this reference will help practitioners address issues in research, development and production. Among other topics, the book addresses: · Developments in process engineering (SMT, Wave, Rework, Paste Technology) · Low temperature, high temperature and high reliability alloys · Intermetallic compounds · PCB surface finishes and laminates · Underfills, encapsulants and conformal coatings · Reliability assessments In a regulatory environment that includes the adoption of mandatory lead-free requirements in a variety of countries, the book's explanations of high-temperature, low-temperature, and high-reliability lead-free alloys in terms of process and reliability implications are invaluable to working engineers. Lead-free Soldering takes a forward-looking approach, with an eye towards developments likely to impact the industry in the coming years. These will include the introduction of lead-free requirements in high-reliability electronics products in the medical, automotive, and defense industries. The book provides practitioners in these and other segments of the industry with guidelines and information to help comply with these requirements.
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Seitenzahl: 755
Veröffentlichungsjahr: 2020
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Table of Contents
Cover
List of Contributors
Introduction
1 Lead‐Free Surface Mount Technology
1.1 Introduction
1.2 Lead‐Free Solder Paste Alloys
1.3 Solder Paste Printing
1.4 Component Placement
1.5 Reflow Process
1.6 Vacuum Soldering
1.7 Paste in Hole
1.8 Robotic Soldering
1.9 Advanced Technologies
1.10 Inspection
1.11 Conclusions
References
2 Wave/Selective Soldering
2.1 Introduction
2.2 Flux
2.3 Amount of Flux Application on a Board
2.4 Flux Handling
2.5 Flux Application
2.6 Preheat
2.7 Selective Soldering
2.8 Wave Soldering
2.9 Conclusions
References
3 Lead‐Free Rework
3.1 Introduction
3.2 Hand Soldering Rework for SMT and PTH Components
3.3 BGA/CSP Rework
3.4 Non‐standard Component Rework (Including BTC/QFN)
3.5 PTH (Pin‐Through‐Hole) Wave Rework
3.6 Conclusions
References
4 Solder Paste and Flux Technology
4.1 Introduction
4.2 Solder Paste
4.3 Flux Technology
4.4 Composition of Solder Paste
4.5 Characteristics of a Solder Paste
4.6 Conclusions
References
5 Low Temperature Lead‐Free Alloys and Solder Pastes
5.1 Introduction
5.2 Development of Robust Bismuth‐Based Low Temperature Solder Alloys
5.3 SMT Process Characterization of Sn‐Bi Based Solder Pastes
5.4 Polymeric Reinforcement of Sn‐Bi Based Low Temperature Alloys
5.5 Mixed SnAgCu‐BiSn BGA Solder Joints
5.6 Solder Joint Reliability
5.7 Conclusions
5.8 Future Development and Trends
References
6 High Temperature Lead‐Free Bonding Materials – The Need, the Potential Candidates and the Challenges
6.1 Introduction
6.2 Solder Materials
6.3 Silver (Ag)‐Sintering Materials
6.4 Transient Liquid Phase Bonding Materials/Technique
6.5 Summary
Acknowledgment
References
7 Lead (Pb)‐Free Solders for High Reliability and High‐Performance Applications
7.1 Evolution of Commercial Lead (Pb)‐Free Solder Alloys
7.2 Third Generation Alloy Research and Development
7.3 Reliability Testing Third Generation Commercial Pb‐Free Solders
7.4 Reliability Gaps and Suggestions for Additional Work
7.5 Conclusions
Acknowledgments
References
8 Lead‐Free Printed Wiring Board Surface Finishes
8.1 Introduction: Why a Surface Finish Is Needed
8.2 Surface Finishes in the Market
8.3 Application Perspective
8.4 A Description of Final Finishes
8.5 Conclusions
References
9 PCB Laminates (Including High Speed Requirements)
9.1 Introduction
9.2 Manufacturing Background
9.3 PCB Fabrication Design and Laminate Manufacturing Factors Affecting Yield and Reliability
9.4 Assembly Factors Affecting Yields and Long‐Term Reliability for Laminate Materials
9.5 Copper Foil Trends (by Silvio Bertling)
9.6 High Frequency/High Speed and Other Trends Affecting Laminate Materials
9.7 Conclusions
References
10 Underfills and Encapsulants Used in Lead‐Free Electronic Assembly
10.1 Introduction
10.2 Rheology
10.3 Curing of Adhesive Systems
10.4 Glass Transition Temperature
10.5 Coefficient of Thermal Expansion (CTE)
10.6 Young's Modulus (E)
10.7 Applications
10.8 Conclusions
References
11 Thermal Cycling and General Reliability Considerations
11.1 Introduction to Thermal Cycling of Electronics
11.2 Influence of Package Type and Thermal Cycling Profile
11.3 Fatigue Life Prediction Models
11.4 Conclusions
References
12 Intermetallic Compounds
12.1 Introduction
12.2 Setting the Stage
12.3 Common Lead‐Free Solder Alloy Systems
12.4 High Lead – Exemption
12.5 Conclusions
References
13 Conformal Coatings
13.1 Introduction
13.2 Environmental, Health, and Safety (EHS) Requirements
13.3 Overview of Types of Conformal Coatings
13.4 Preparatory Steps Necessary to Ensure a Successful Coating Process
13.5 Various Methods of Applying Conformal Coating
13.6 Aspects for Cure, Inspection, and Demasking
13.7 Repair and Rework Processes
13.8 Design Guidance on When and Where Conformal Coating is Required, and Which Physical Characteristics and Properties are Important to Consider
13.9 Long‐Term Reliability and Testing
13.10 Conclusions
13.11 Future Work
References
Index
End User License Agreement
List of Tables
Chapter 1
Table 1.1 General solder paste type and particle sizes.
Table 1.2 Typical lead‐free profile parameters for lead‐free.
Chapter 3
Table 3.1 Tin‐lead hand soldering technology rework trend [2].
Table 3.2 Lead‐free hand soldering technology rework trend [2, 3].
Table 3.3 Tin‐lead BGA rework [2].
Table 3.4 Lead‐free BGA rework [2, 3].
Table 3.5 Lead‐free PTH rework [2, 3].
Table 3.6 Gold dissolution rate in lead‐free and tin‐lead solder [15–17].
Table 3.7 Silver dissolution rate in lead‐free and tin‐lead solder [15–17].
Table 3.8 Copper dissolution rate in lead‐free and tin‐lead solder [15–17].
Table 3.9 Palladium dissolution rate in lead‐free and tin‐lead solder [15–17]...
Table 3.10 Nickel dissolution rate in lead‐free and tin‐lead solder [15–17].
Table 3.11 Iron dissolution rate in lead‐free and tin‐lead solder [16].
Chapter 4
Table 4.1 Characteristics for good solder paste performance.
Table 4.2 Components of a flux.
Chapter 5
Table 5.1 Classification, elemental composition, melting range and metallurgi...
Table 5.2 Estimated cost‐saving comparison for SnAgCu versus BiSnAg soldering...
Table 5.3 Rheological properties of two SnBi low temperature solder pastes co...
Table 5.4 Reflow profile critical success criteria used to establish the comm...
Table 5.5 Melting start and end temperatures for BiSn solder pastes as a func...
Table 5.6 QFN/BTC thermal pad void results for a selection of LTS pastes vers...
Table 5.7 Qualitative ranking of the effectiveness of primary SMT process fac...
Table 5.8 Calculation for paste:ball volume ratio square and round stencil ap...
Table 5.9 Drop/shock capability comparison for SnAgCu solder joints versus hy...
Table 5.10 Various transient liquid phase soldering systems.
Chapter 6
Table 6.1 Physical and mechanical properties of some potential high temperatu...
Chapter 7
Table 7.1 Composition and melting range of high‐Ag, near eutectic first gener...
Table 7.2 A list of the trade names, alloy developers, and chemical compositi...
Table 7.3 Nominal solder compositions and estimated melting ranges for the hi...
Table 7.4 Thermal cycling profiles used in the iNEMI Third Generation Alloy p...
Table 7.5 A summary of accelerated temperature cycling failure statistics for...
Chapter 8
Table 8.1 Extrapolated market situation based on growth data provided by 2017...
Table 8.2 An overview of the performance characteristics for some of the reco...
Table 8.3 Final finish with reference to fine line capabilities.
Table 8.4 Final finish use with reference to technology.
Table 8.5 How each final finish was scored in terms of complexity.
Table 8.6 Complexity score for HASL.
Table 8.7 Complexity score for OSP.
Table 8.8 Complexity score for immersion tin.
Table 8.9 Complexity score for immersion silver.
Table 8.10 Complexity score for electroless nickel/immersion gold.
Table 8.11 Complexity score for electroless nickel electroless palladium imme...
Table 8.12 Complexity score for electroless nickel and semi‐autocatalytic gol...
Table 8.13 Complexity score for electroless palladium and semi‐autocatalytic ...
Table 8.14 Complexity score for electrolytic nickel electrolytic gold.
Chapter 9
Table 9.1 Maximum foil roughness from IPC‐4562, metal foil for printed wiring...
Table 9.2 Symbols for roughness which were revised.
Chapter 10
Table 10.1 Typical viscosities.
Table 10.2 Typical shear rates.
Table 10.3 Instrument effect on T
g
.
Table 10.4 Effect of filler on CTE.
Table 10.5 Different performance requirements for flip chip and chip scale pa...
Table 10.6 Different reliability and processing requirements for flip chip un...
Chapter 11
Table 11.1 Field conditions for various industries [2].
Chapter 12
Table 12.1 Relevant sections of this chapter, organized by solder alloy.
Table 12.2 Issue‐based guide to the chapter.
Table 12.3 Alloy/substrate systems covered in this chapter.
Table 12.4 Properties of intermetallics relevant to solder joint reliability.
Table 12.5 Intermetallic compounds and their deviations from stoichiometry fo...
Chapter 13
Table 13.1 General guidelines when using dyne pens.
Table 13.2 Cure mechanisms (liquid coatings).
Table 13.3 Standard conformal coating material comparison.
List of Illustrations
Chapter 1
Figure 1.1 Example of tailing at the edge of the paste due to high separatio...
Figure 1.2 Reflow profile chart [3]. Copyright 2019 by IPC International, In...
Figure 1.3 Example of lead‐free profile using a vacuum reflow oven.
Figure 1.4 Example of a soldering robot.
Figure 1.5 Package on package (PoP) component.
Figure 1.6 Solder paste inspection image.
Figure 1.7 Example AOI inspection images of lead‐free soldered chip (top) an...
Figure 1.8 Example of power transistor/BTC, chip, and lead‐free Sn3Ag0.5Cu B...
Chapter 2
Figure 2.1 A head servo jet fluxer with air knife.
Figure 2.2 Drop jet with robot unit and flux supply hoses.
Figure 2.3 IR lamps on bottom and top side.
Figure 2.4 Forced convection preheater wave solder machine.
Figure 2.5 Wettable nozzle with de‐bridging tool.
Figure 2.6 Dip solder process with nozzles covered by shield to generate nit...
Figure 2.7 Double wave former with turbulent first and laminar main wave.
Chapter 3
Figure 3.1 Soldering tip cross‐section [1].
Figure 3.2 Erosion results of copper plate on different alloys (anti‐erosion...
Figure 3.3 Erosion results of iron plate on different alloys (anti‐erosion a...
Figure 3.4 Iron plating erosion thickness for different alloys. (anti‐erosio...
Figure 3.5 Cross‐section of solder iron tips used with different alloys (Sn3...
Figure 3.6 Schematic view of reaction between solder iron tip and melted sol...
Figure 3.7 Gold dissolution rate (μm/s) in lead‐free and ...
Figure 3.8 Silver dissolution rate (μm/s) in lead‐free and ...
Figure 3.9 Copper dissolution rate (μm/s) in lead‐free and ...
Figure 3.10 Palladium dissolution rate (μm/s) in lead‐free ..
Figure 3.11 Nickel dissolution rate (μm/s) in lead‐free and ...
Figure 3.12 Iron dissolution rate (μm/s) in lead‐free and t...
Chapter 4
Figure 4.1 Classification of paste according to cleaning type.
Figure 4.2 Relationship between solderability and surface insulation r...
Figure 4.3 Solder paste composition.
Figure 4.4 Atomization method for solder powder manufacture.
Figure 4.5 Solder particle size versus oxide content.
Figure 4.6 (a) and (b) Solder powder particle (left) and solder powder ...
Figure 4.7 Different powders sizes for PoP [6].
Figure 4.8 Voiding comparison on a power transistor BTC component usin...
Figure 4.9 Model showing behavior of developed lead‐free SnAgCu ...
Figure 4.10 Head‐on‐pillow component soldering defect [12].
Chapter 5
Figure 5.1 Classification of solders used in electronics assembly base...
Figure 5.2 Comparison of current loading for a reflow oven when runnin...
Figure 5.3 Moore's law graph of year versus node size for silicon tran...
Figure 5.4 Trends for package Z‐height (left y‐axis) and c ...
Figure 5.5 Typical warpage shapes of FCBGA packages and PCBs (a) at ro...
Figure 5.6 Description of defects that can be caused by dynamic warpag...
Figure 5.7 Dynamic warpage plots with temperature for (a) a FCBGA pack...
Figure 5.8 (a) Sn‐Bi phase diagram along with distinct regions w...
Figure 5.9 Different alloying elements can provide nucleation sites fo...
Figure 5.10 Elongation of Sn‐Bi alloy maximized between 25 and 4...
Figure 5.11 SIR Data collected on 13 different solder pastes from 4 di...
Figure 5.12 Solder paste printed volume versus aperture size (round) f...
Figure 5.13 Soak‐ramp‐peak profile for low temperature sol...
Figure 5.14 Various polymeric reinforcement strategies for area array ...
Figure 5.15 Process steps for various alternatives for the polymeric r...
Figure 5.16 Process steps for polymeric reinforcement of area array co...
Figure 5.17 Comparison of two Sn‐Bi JRP material profiles with a...
Figure 5.18 An optical microscopy cross‐section image of a SnAgC...
Figure 5.19 Dark field optical microscopy cross‐section images o...
Figure 5.20 Partial wetting defects for BGA solder joints caused when ...
Figure 5.21 Effect of a slower ramp rate for JRP solder pastes on the ...
Figure 5.22 Transfer Efficiency of BiSn, JRP and SnAgCu solder pastes ...
Figure 5.23 Comparison of the Characteristic Life, η (eta), extra...
Figure 5.24 Comparison of the Characteristic Life, η (eta), extra...
Figure 5.25 Plot of Characteristic Life, η, under mechanical shoc...
Figure 5.26 Solder joint displacement behavior for a fully melted sold...
Figure 5.27 Hybrid SnAgCu – Sn‐Bi solder joint reflowed at...
Figure 5.28 Plot of solder joint height versus peak reflow temperature...
Figure 5.29 Pathways for interdiffusion of bismuth from the Sn‐B...
Figure 5.30 Change in the extent of the hybrid bismuth diffusion zone ...
Figure 5.31 Comparison of the change in the extent of hybrid bismuth d...
Figure 5.32 Left image solder joint reflowed once, right image solder ...
Figure 5.33 Increased hybrid Bi diffusion zone microstructure refineme ...
Figure 5.34 Time zero hybrid bismuth zone microstructure versus weight ...
Figure 5.35 Comparison of IMC thickness (on Cu OSP surface finish) for ...
Figure 5.36 Resulting hybrid bismuth diffusion region bismuth concentra ...
Figure 5.37 Post‐SMT void measurements for a 400 μm BGA ball ...
Figure 5.38 Extreme examples of time zero “hot tearing” in a...
Figure 5.39 Dye and pulled solder joints. No “hot tearing” o...
Figure 5.40 Solder joint height post‐SMT for a 400 μm BGA bal...
Figure 5.41 Left image shows hybrid solder joint in 2.5D tilt X‐ra...
Figure 5.42 Time zero solder joint assembled with a paste:ball volume ra...
Figure 5.43 Hybrid SnAgCu‐SnBi solder joint illustrating bismuth c...
Figure 5.44 Weibull plot of cycles to fail versus paste:ball ratio for a...
Figure 5.45 Typical fatigue cracking signature in a hybrid SnAgCu‐...
Figure 5.46 Demonstration of improvement in drop/shock performance enabl...
Chapter 6
Figure 6.1 Summary of die‐attach bonding materials [10, 11].
Figure 6.2 The bond shear strength of HTLF candidates [39, 43–49].
Figure 6.3 Mechanical property, microstructure, and fracture morphology ...
Figure 6.4 Shear force and displacement curve of BiAgX joint [53, 54].
Figure 6.5 Creep behavior of BiAgX joint [59].
Figure 6.6 BiAgX joint bond shear strength after thermal aging [45,52,...
Figure 6.7 BiAgX joint bond shear strength after thermal cycling test [39,45...
Figure 6.8 Microstructure of BiAgX joint (a) morphology of a BiAgX joint bet...
Figure 6.9 Microstructural evolution of networked AgSn precipitates upon agi...
Figure 6.10 Recrystallization of BiAgX joint from the interrupted high tempe...
Figure 6.11 Evolution of the BiAgX joint under thermal cycling testing: the ...
Figure 6.12 (a) X‐ray image of Si/BiAgX/Cu joint after 2000 cycl...
Figure 6.13 Differential scanning calorimetry of three SnSbCuAg alloys [68]....
Figure 6.14 Die shattering after bond shear testing for Si/SiN DBC package....
Figure 6.15 Joint shear strength of Alloy #2 and #3 before and after TCT tes...
Figure 6.16 Microstructure of SnSbCuAg joint for Si die/SiN DBC substrate, (...
Figure 6.17 Microstructure of cast Zn‐4Al alloy.
Figure 6.18 (a) Joining the powders from the contact area during sintering t...
Figure 6.19 The schematic reaction mechanism of TLPB materials to form the h...
Figure 6.20 The morphology of the TLPB joint from (a) copper‐tin paste betwe...
Chapter 7
Figure 7.1 Thermal cycling test data from Terashima et al. showing the direc...
Figure 7.2 Thermal cycling test data from Coyle et al. showing the direct re...
Figure 7.3 Thermal cycling test data from Henshall et al. showing the direct...
Figure 7.4 Data of Kim et al. showing cumulative failures versus number of d...
Figure 7.5 Data of Syed et al. showing improved 1st failure drop test perfor...
Figure 7.6 Illustrations of (a) sensor and electronic control module locatio...
Figure 7.7 (a) Areas of innovation that are driving the increase in electron...
Figure 7.8 Data projecting the growth of electric vehicle sales.
Figure 7.9 The need for advanced technologies is driving increased automotiv...
Figure 7.10 Scanning electron micrographs illustrating Ag
3
Sn intermetallic p...
Figure 7.11 A scanning electron micrograph showing the accelerated intermeta...
Figure 7.12 Data from the iNEMI 3rd Generation Alloy test program demonstrat...
Figure 7.13 Aerospace/defense applications are characterized by harsh use en...
Figure 7.14 A simple schematic illustrating lattice distortion due to substi...
Figure 7.15 A simple schematic comparing solid solution (left) and dispersio...
Figure 7.16 Data of Miric showing Sn3.8Ag0.7Cu3.0Bi1.5Sb0.15Ni (Innolot) out...
Figure 7.17 The Sn‐Sb binary phase diagram.
Figure 7.18 The In‐Sn binary phase diagram.
Figure 7.19 The Sn‐Bi binary phase diagram.
Figure 7.20 Emphasis on the Sn‐rich regions of the Sn‐Bi binary phase diagra...
Figure 7.21 A fully populated, daisy‐chained test vehicle and BGA components...
Figure 7.22 Bar charts comparing the characteristic lifetimes (N63) of the 1...
Figure 7.23 Solder fatigue failures in the 192CABGA component with the SB6NX...
Figure 7.24 Interfacial or mixed mode fracture in the 192CABGA component wit...
Figure 7.25 Backscattered electron micrographs showing examples of represent...
Figure 7.26 Backscattered electron micrographs of the baseline microstructur...
Figure 7.27 Illustration of mixed metallurgy BGA assembly with SAC305 BGA ba...
Figure 7.28 Multiple fracture modes in a single BGA sample after approximate...
Figure 7.29 An illustration of multiple fracture modes in a BGA sample cause...
Chapter 8
Figure 8.1 Global distribution of final finishes in terms of value for 2017 ...
Figure 8.2 Global distribution of final finishes in terms of value for 2018....
Figure 8.3 The evolution of the final finish market from 2017 to 2018 in M$....
Figure 8.4 A comparison of the final finishes with respect to thickness afte...
Figure 8.5 Gap losses of the finishes at typical layer thicknesses.
Figure 8.6 Process sequence with relative generic processing times in second...
Figure 8.7 The total complexity score by finish.
Figure 8.8 Final finishes according to process complexity.
Figure 8.9 A visual breakdown of the complexity scores for HASL.
Figure 8.10 The typical process flow for hot air solder leveling (HASL).
Figure 8.11 A diagrammatic representation of inadequate solder removal from ...
Figure 8.12 A visual breakdown of the complexity scores for OSP.
Figure 8.13 The typical process flow for OSP.
Figure 8.14 A comparison of the wetting angle versus reflow atmosphere for H...
Figure 8.15 A visual breakdown of the complexity scores for immersion tin.
Figure 8.16 The typical process flow for immersion tin (horizontal processin...
Figure 8.17 Diagrammatic representation of “Mouse Bites.”
Figure 8.18 The creation of tin whiskers because of internal stress, in this...
Figure 8.19 Tin whiskers in combination with press‐fit components.
Figure 8.20 A visual breakdown of the complexity scores for immersion silver...
Figure 8.21 The typical process flow for immersion silver.
Figure 8.22 Diagrammatic plan view of I‐Ag galvanic attack.
Figure 8.23 Scanning electron microscopy (SEM) of silver creep corrosi...
Figure 8.24 A visual breakdown of the complexity scores for electroles...
Figure 8.25 The typical process flow for electroless nickel and immers...
Figure 8.26 SEM of the nickel foot failure and the remedy.
Figure 8.27 SEM investigation of nickel corrosion versus no corrosion ...
Figure 8.28 A visual breakdown of the complexity scores for electroles...
Figure 8.29 The typical process flow for electroless nickel electroles...
Figure 8.30 SEMs to show in (a) a case of hyper‐corrosion to a p...
Figure 8.31 A visual breakdown of the complexity scores for electroles...
Figure 8.32 The typical process flow for electroless nickel/autocataly...
Figure 8.33 A visual breakdown of the complexity scores for electroles...
Figure 8.34 The typical process flow for electroless palladium and sem...
Figure 8.35 The impact of gold thickness on solder joint ductility.
Figure 8.36 A visual breakdown of the complexity scores for electrolyt...
Figure 8.37 The typical process flow for electrolytic nickel electroly...
Figure 8.38 The impact of palladium and gold thickness on solder joint...
Figure 8.39 The relative cost impact of lead‐free solderable fin...
Chapter 9
Figure 9.1 Smoother foil before fabricator treatment (left). Typical s...
Chapter 10
Figure 10.1 Basic rheology concepts.
Figure 10.2 Simple rheological response.
Figure 10.3 Shear thinning behavior of dispersions.
Figure 10.4 Rheological response of a thixotropic fluid.
Figure 10.5 Particle interactions in a silica dispersion.
Figure 10.6 Spindle type viscometer.
Figure 10.7 Cone and plate configuration.
Figure 10.8 Viscosity curve for a highly thixotropic fluid.
Figure 10.9 Bisphenol a diglycidyl ether epoxy resin.
Figure 10.10 Ring opening of epoxy by curing agent RNH
2
.
Figure 10.11 Illustration of the curing process.
Figure 10.12 Typical oven profile for curing an underfill.
Figure 10.13 DSC curves illustrating the effect of temperature on degree of ...
Figure 10.14 Typical dynamic DSC trace.
Figure 10.15 The electromagnetic spectrum.
Figure 10.16 Example UV curing systems.
Figure 10.17 Example of DSC to measure T
g
.
Figure 10.18 Thermomechanical analysis used to measure T
g
.
Figure 10.19 Dynamic mechanical analysis used to measure T
g
.
Figure 10.20 Effect of temperature on CTE.
Figure 10.21 An example of a strain‐stress graph for determining modulus.
Figure 10.22 Graph showing the relationship between CTE, modulus, and failur...
Figure 10.23 Reliability of various underfill materials with respect to drop...
Figure 10.24 Underfill reliability with respect to thermal cycling.
Figure 10.25 Images of pads during rework process (from left to right: after...
Figure 10.26 Corner bonded CSP.
Figure 10.27 Glob top.
Figure 10.28 (a) Encapsulant. (b and c) Encapsulant with UV‐indicating dye (...
Figure 10.29 Low‐pressure molding.
Chapter 11
Figure 11.1 CTE mismatch in electronic assemblies at elevated temperatures....
Figure 11.2 Fatigue cracks in solder joints of 2512 chip resistors after the...
Figure 11.3 Potential failure modes in thermal cycling test boards.
Figure 11.4 Characteristic life when thermal cycling (−40 °C/125 °C) for a 2...
Figure 11.5 Thermal cycling failure risk for various through‐hole and surfac...
Figure 11.6 Weibull plots were used to determine 1% failure at three differe...
Figure 11.7 Normalized time to failure as a function of dwell time at maximu...
Figure 11.8 Image of test board assembled with components.
Figure 11.9 FR‐4 PCB with (a) 19 layers of 1080 and (b) 7 layers of 7628 gla...
Figure 11.10 Cross‐sections of assembled 2512 resistors with small and large...
Figure 11.11 Failure distribution of resistors assembled on 1080 and 7628 gl...
Figure 11.12 Optical image showing cracking in solder joints of (Left) 0402 ...
Chapter 12
Figure 12.1 SEM image of bulk SnAg3.8Cu0.7 solder joint. Sn‐rich,...
Figure 12.2 Sn‐2.8Cu solder joint with Cu
6
Sn
5
....
Figure 12.3 SEM image of Sn‐Ag3.8 –Cu0.7/Ni‐P solder jo ...
Figure 12.4 Cu
6
Sn
5
IMC layer between SAC‐305 ...
Figure 12.5 Chip Scale Package (CSP) is an example of an area array joint...
Figure 12.6 Ductile crack growth after a (a) 15% load drop (top) and (b) ...
Figure 12.7 Brittle interfacial crack from high strain rate drop test on ...
Figure 12.8 Schematic representation of the strain induced on the solder ...
Figure 12.9 (a) A typical BGA solder joint connecting a component to a PCB. ...
Figure 12.10 Schematic of crack path and images of actual ball shear tests a...
Figure 12.11 The size of a microbump compared to a BGA. The left images are ...
Figure 12.12 (a) Calculated metastable equilibria in the Sn‐Cu‐...
Figure 12.13 Sn‐Cu binary phase diagram [35].
Figure 12.14 Microvoids formed in (a) between Cu
3
Sn and Cu. (b)...
Figure 12.15 Microstructures of Cu
6
Sn
5
grains formed...
Figure 12.16 Sn‐Ag binary phase diagram [42].
Figure 12.17 Two projections of the liquidus surface of the Sn‐Ag...
Figure 12.18 Sn‐Ag‐Cu isothermal phase diagram at (a) 150....
Figure 12.19 Minimum creep rate versus applied stress for Sn‐3...
Figure 12.20 Microstructure of Sn‐3.5Ag after creep deformation ...
Figure 12.21 Microstructure of Sn3Ag0.5Cu solder alloy showing dark ...
Figure 12.22 SEM images of Sn3.0Ag0.5Cu/Cu interface aged at 150 ° ...
Figure 12.23 Fracture surfaces of unaged and aged samples as a function...
Figure 12.24 Ni‐Sn binary phase diagram [22].
Figure 12.25 Ni
3
Sn
4
intermetallic in a Ni‐P...
Figure 12.26 Sn‐3.5Ag solder reflowed for 600 seconds at 251 °...
Figure 12.27 Sn‐Ag‐Ni isothermal phase diagram at (a) 150 °...
Figure 12.28 Sn‐Ni‐Cu isothermal phase diagrams at (a) 150 °...
Figure 12.29 Etched micrographs of SnAgCu/Ni interface during isothermal agi...
Figure 12.30 Liquidus projections for tin‐rich corner of the Sn‐...
Figure 12.31 Micrographs showing the interface of solder joints of compositi...
Figure 12.32 Voids forming in Ni
3
P layer after reflow at 251 °...
Figure 12.33 Au‐Sn binary phase diagram.
Figure 12.34 Concentration profile of gold in the Sn/Au/Sn binary diffusion ...
Figure 12.35 Au/Sn bulk diffusion couple annealed at 200 °C: (a) for 4 hours...
Figure 12.36 BSE images of the Au/Sn electroplated diffusion couple after st...
Figure 12.37 Cross‐section backscattered SEM images of 95Pb5Sn solder bumps ...
Chapter 13
Figure 13.1 Standard dyne pen samples.
Figure 13.2 Cracked coated areas.
Figure 13.3 Peeling coated areas.
Figure 13.4 Critical surface tension for 5 μl of deionized water...
Figure 13.5 The effect of flux surfactant type on conformal coating w....
Figure 13.6 Diagram of the pertinent measurements for contact angle.
Figure 13.7 Goniometer.
Figure 13.8 Dip coating equipment.
Figure 13.9 Atomized spray applicator.
Figure 13.10 Film applicator nozzle.
Figure 13.11 Vapor deposition equipment.
Figure 13.12 Conformal coating AOI bubble capture.
Figure 13.13 Coating cracking (due to hardness).
Guide
Cover
Table of Contents
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Wiley Series in Quality & Reliability Engineering
Dr. Andre Kleyner
Series Editor
The Wiley Series in Quality & Reliability Engineering aims to provide a solid educational foundation for both practitioners and researchers in the Q&R field and to expand the reader's knowledge base to include the latest developments in this field. The series will provide a lasting and positive contribution to the teaching and practice of engineering.
The series coverage will contain, but is not exclusive to,
Statistical methods
Physics of failure
Reliability modeling
Functional safety
Six‐sigma methods
Lead‐free electronics
Warranty analysis/management
Risk and safety analysis
Wiley Series in Quality & Reliability Engineering
Lead‐free Soldering Process Development and Reliabilityby Jasbir Bath (Editor)2020
Thermodynamic Degradation Science: Physics of Failure, Accelerated Testing, Fatigue and Reliabilityby Alec FeinbergOctober 2016
Design for Safetyby Louis J. Gullo, Jack DixonFebruary 2018
Next Generation HALT and HASS: Robust Design of Electronics and Systemsby Kirk A. Gray, John J. PaschkewitzMay 2016
Reliability and Risk Models: Setting Reliability Requirements, 2nd Editionby Michael TodinovSeptember 2015
Applied Reliability Engineering and Risk Analysis: Probabilistic Models and Statistical Inferenceby Ilia B. Frenkel, Alex Karagrigoriou, Anatoly Lisnianski, Andre V. KleynerSeptember 2013
Design for Reliabilityby Dev G. Raheja (Editor), Louis J. Gullo (Editor)July 2012
Effective FMEAs: Achieving Safe, Reliable, and Economical Products and Processes Using Failure Modesand Effects Analysisby Carl CarlsonApril 2012
Failure Analysis: A Practical Guide for Manufacturers of Electronic Components and Systemsby Marius Bazu, Titu BajenescuApril 2011
Reliability Technology: Principles and Practice of Failure Prevention in Electronic Systemsby Norman PascoeApril 2011
Improving Product Reliability: Strategies and Implementationby Mark A. Levin, Ted T. KalalMarch 2003
Test Engineering: A Concise Guide to Cost‐Effective Design, Development and Manufactureby Patrick O'ConnorApril 2001
Integrated Circuit Failure Analysis: A Guide to Preparation Techniquesby Friedrich BeckJanuary 1998
Measurement and Calibration Requirements for Quality Assurance to ISO 9000by Alan S. MorrisOctober 1997
Electronic Component Reliability: Fundamentals, Modelling, Evaluation, and Assuranceby Finn Jensen1995
Lead-free Soldering Process Development and Reliability
Edited by
Mr. Jasbir Bath
Bath Consultancy LLC11040 Bollinger Canyon Road, #E-122San RamonCA 94582, USAEmail: [email protected]
This edition first published 2020© 2020 John Wiley & Sons, Inc
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopying, recording or otherwise, except as permitted by law. Advice on how to obtain permission to reuse material from this title is available at http://www.wiley.com/go/permissions.
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Library of Congress Cataloging‐in‐Publication Data
Names: Bath, Jasbir, editor.
Title: Lead-free soldering process development and reliability / edited by Jasbir Bath, Bath Consultancy LLC.
Description: First edition. | Hoboken, NJ : John Wiley & Sons, Inc., 2020. | Series: Wiley series in quality & reliability engineering | Includes bibliographical references and index.
Identifiers: LCCN 2020004969 (print) | LCCN 2020004970 (ebook) | ISBN 9781119482031 (hardback) | ISBN 9781119482048 (adobe pdf) | ISBN 9781119481935 (epub)
Subjects: LCSH: Electronic packaging. | Solder and soldering.
Classification: LCC TK7870.15 .L434 2020 (print) | LCC TK7870.15 (ebook) | DDC 621.381/046--dc23
LC record available at https://lccn.loc.gov/2020004969
LC ebook record available at https://lccn.loc.gov/2020004970
Cover Design: WileyCover Image: © Paul Krugman/Shutterstock
List of Contributors
Raiyo Aspandiar
Intel CorporationHillsboro, ORUSA
Nilesh Badwe
Intel CorporationHillsboro, ORUSA
Jasbir Bath
Bath Consultancy LLCSan Ramon, CAUSA
Silvio Bertling
MesaArizona, USA
Peter Borgesen
Integrated Electronics Engineering CenterBinghamton University, State University of New York, NYUSA
Kevin Byrd
Intel CorporationHillsboro, ORUSA
Richard J. Coyle
Nokia Bell LaboratoriesMurray Hill, NJUSA
Travis Dale
School of Mechanical EngineeringPurdue UniversityWest Lafayette, INUSA
Gerjan Diepstraten
Vitronics SoltecOosterhout, The Netherlands
Carol Handwerker
School of Materials EngineeringPurdue UniversityWest Lafayette, INUSA
Shantanu Joshi
Koki Solder AmericaCincinnati, OHUSA
Jason Keeping
Celestica Inc.TorontoCanada
Ning‐Cheng Lee
Indium CorporationClinton, NYUSA
Elizabeth McClamrock
School of Materials EngineeringPurdue UniversityWest Lafayette, INUSA
Jennifer Nguyen
FlexMilpitas, CaliforniaUSA
Rick Nichols
AtotechBerlinGermany
Ganesh Subbarayan
School of Mechanical EngineeringPurdue UniversityWest Lafayette, INUSA
Karl Sauter
Oracle CorporationSanta Clara, CaliforniaUSA
Maxim Serebreni
Department of Mechanical EngineeringUniversity of MarylandCollege Park, MDUSA
Brian J. Toleno
MicrosoftMountain View, CaliforniaUSA
Alyssa Yaeger
School of Materials EngineeringPurdue UniversityWest Lafayette, INUSA
Hongwen Zhang
Indium CorporationClinton, NYUSA
Introduction
With the movement to lead‐free soldering in electronics manufacturing production, there is a need for an updated review of various topics in this area for practicing process, quality and reliability engineers and managers to be able to use to address issues in production.
The book gives updates in areas for which research is ongoing, and addresses new topics which are relevant to lead‐free soldering. It covers a list of key topics including developments in process engineering, alloys, printed circuit board (PCB) surface finishes, PCB laminates, and reliability assessments.
Chapter 1 discusses lead‐free surface mount technology (SMT) with review of the surface mount process for lead‐free soldering, including printing, component placement, reflow, inspection, and test.
Chapter 2 covers lead‐free selective and wave soldering in terms of flux and preheat processes as well as the similarities and differences of these processes.
Chapter 3 discusses the issues during lead‐free rework for the assembled components based on the higher lead‐free soldering temperatures and the range of small and large components to rework as well as temperature and moisture sensitivity with components and boards. The chapter reviews updates in lead‐free rework technology including hand soldering, ball grid array/chip scale packageBGA/CSP rework, and PTH (Pin Through Hole) rework.
Chapter 4 discusses lead‐free solder paste and flux technology and the characteristics needed for these materials to ensure good solder paste performance. It also reviews the defects which can occur during electronics manufacturing, including micro solder balls, voiding, tombstoning, bridging, opens, head‐on‐pillow, and non‐wet opens.
Chapter 5 covers low temperature lead‐free alloys and pastes, with an emphasis on the Bi‐Sn system and the development work ongoing in this area.
Chapter 6 discusses solder materials, silver‐sintering materials, and TLPB (transient liquid phase bonding) materials as the three potential candidate types for lead‐free, high‐temperature, die‐attachment materials.
Chapter 7 covers the drivers, benefits, and concerns associated with the development and implementation of third generation, high reliability lead‐free solders.
Chapter 8 reviews lead‐free surface finish alternates to the electrolytic nickel immersion gold surface finish in relation to performance characteristics and cost, with selection of a final board surface finish being of significance to the assembly and reliability of the product.
Chapter 9 discusses several critical factors relating to PCB laminate materials and describes why they are important to ensuring that the finished board performance requirements are met.
Chapter 10 reviews the use of adhesives in the manufacturing of high‐density lead‐free surface mount assemblies, with a discussion of the two adhesive applications used widely for increased reliability: underfills and encapsulants.
Chapter 11 overviews thermal cycling reliability in relation to lead‐free solder joints, with the reliability of solder interconnects influenced by all aspects of the electronic assembly, ranging from the component package style and circuit board construction to the solder composition.
Chapter 12 discusses intermetallic compounds (IMCs) formed in the lead‐free solder joints with a discussion of the roles that IMCs play in determining solder joint reliability, and how those roles change as a result of aging or damage induced by thermal cycling. It covers the performance of common lead‐free solder alloys in combination with metallizations and surface finishes to understand what to expect in these specific systems and the problems that may arise when combining new solder alloys and surface finishes/metallizations and the methodologies that can be used to separate out the different possible root causes.
The final chapter (Chapter 13) covers industry updates in the use of conformal coatings and their use in electronics manufacturing and their effect on reliability. Various aspects of conformal coatings are discussed, including Environmental Health and Safety (EHS) requirements, the five basic conformal coating types and new emerging materials, preparation, application, cure, and inspection of conformal coatings, repair and rework, and design guidance on when and where coatings are required, and which physical characteristics and properties are important to consider.
1Lead‐Free Surface Mount Technology
Jennifer Nguyen1 and Jasbir Bath2
1Flex, Milpitas, California, USA
2Bath Consultancy LLC, San Ramon, CA, USA
1.1 Introduction
Surface mount technology (SMT) involves the assembly or attachment of surface mount devices (SMDs) onto the printed circuit board (PCB). Today, the majority of the products are built using surface mount technology and lead‐free process. This chapter will review the surface mount process for lead‐free soldering, including printing, component placement, reflow, inspection, and test. The chapter also discusses some advanced miniaturization technologies used in the SMT process.
1.2 Lead‐Free Solder Paste Alloys
Today, there are a variety of lead‐free solder paste alloys available in the market. SnAgCu (SAC) materials with 3.0–4.0% Ag and 0.5–0.9% Cu and remainder Sn are widely accepted within the industry. Among them, Sn3.0Ag0.5Cu (SAC305) is still the most common alloy used in the SMT process. These SnAgCu alloys have the liquidus temperature of around 217 °C. As the cost of Ag has increased over the past years, the use of low Ag alloy materials such as Sn0.3‐1.0AgCu or SnCu/SnCuNi has increased. These alloys have approximately 10 °C higher melting temperature than SAC305 and may need to be processed at slightly higher temperature during the reflow process.
Low temperature lead‐free alloys which contain SnBi/SnBiAg are also used. These alloys have melting temperature around 140 °C and can be processed at 170–190 °C. These low temperature alloys usually have high bismuth content and they create some reliability concerns, especially on mechanical reliability. These low temperature alloys are used on certain applications such as light‐emitting diode (LED)/TV products. In recent years, there is a desire for low temperature lead‐free alloy alternatives with better reliability. The drivers for these low temperature alloys include component warpage, low energy consumption, and component or board sensitivity to the higher temperature lead‐free process. These alloys typically have higher liquidus temperature than traditional SnBi/SnBiAg alloys, but they still have lower liquidus temperature than SAC305. These alloys have gained a lot of interest in the industry in the recent years, and some are available in the market and used in production.
1.3 Solder Paste Printing
1.3.1 Introduction
One of the most important processes of the surface mount assembly is the application of solder paste to the PCB. This process must accurately deposit the correct amount of solder paste onto each of the pads to be soldered. Screen‐printing the solder paste through a foil or stencil is the most commonly used technique, although other technique such as jet printing is also used.
There is no major change to solder paste printing for lead‐free processes. The same printer can be used for tin‐lead and lead‐free printing. In general, the same stencil design guidelines can be used for lead‐free process.
1.3.2 Key Paste Printing Elements
Solder paste printing process is one of the most important processes in surface mount technology. This process can account for the majority of the assembly defects if it is not controlled properly. For effective solder paste printing, the following key factors need to be optimized and controlled:
PCB support
Squeegee (type, speed, pressure, angle)
Stencil (thickness, aperture, cleanliness, snap off, separation speed)
Solder paste (including type, viscosity)
PCB support is important to the printing process. Good PCB support holds the PCB flat against the stencil during the screen‐printing process. PCB support is generally provided with the screen‐printing machines. If the board is not properly supported, solder defects such as bridging, insufficient solder, and solder smearing can be seen. For fine pitch printing such 0.3/0.4 mm pitch chip scale package (CSP), 0201/01005 (Imperial) chip component, a dedicated custom‐made fixture for printing or vacuum support should be used.
Squeegees, squeegee pressure, and speed are other critical parameters in the screen‐printing process. Metal squeegees are commonly used for printing solder paste, and rubber or polyurethane squeegees are used for epoxy printing. A squeegee angle of 60 °C to the stencil is typically used [1]. Squeegee speed and squeegee pressure are critical for good printing. The speed of the squeegee determines how much time the solder paste can roll and settle into the apertures of the stencil and onto the pads of the PCB. In the beginning of lead‐free conversion, a slower printing speed was used because the lead‐free solder paste was stickier than tin‐lead solder paste. Today, many lead‐free solder pastes can print well at high speed.
The speed setting is widely varied from a typical range of 20–100 mm/s−1 depending on the size of the aperture, the size of PCB, and the quantity of boards being assembled, etc. Printing speed used depends on the solder paste supplier or is optimized by a Design of Experiment (DOE). It is typically between 40 and 80 mm s−1. During the solder paste printing, it is important to apply sufficient squeegee pressure and this pressure should be evenly distributed across the entire squeegees. Too little pressure can cause incomplete solder paste transfer to the PCB or paste smearing. Too much pressure can cause the paste to squeeze between the stencil and the pad.
Stencil is another key factor in the solder paste printing. Metal stencils are used in solder paste printing. Stainless steel material is commonly used; however, metal stencils can be made of copper, bronze, or nickel [2]. There are several types of screen‐printing stencil, including chemical etch, laser cut, and electroformed [2]. The thickness of the stencil is typically 125 μm (5 mil) or 150 μm (6 mil). Stencils with the thickness of 100 μm (4 mil) or thinner have become more popular with the high density and fine pitch components such as 0201/01005 (Imperial) chip components or 0.4/0.3 mm pitch CSP or quad flat no‐leads/bottom termination component (QFN/BTC) components. Thicker stencils than 150 μm are typically used when more paste is needed. Stencil thickness and aperture size determine the amount of paste deposited on the pad. In general, stencil aperture must be three times and preferably five times the diameter of the solder particles. To ensure the proper paste release and efficient printing, the aspect ratio should be greater than 1.5, and the area ratio should be greater 0.66.
The aspect ratio is defined by Eq. (1.1), and the area ratio is shown in Eq. (1.2).
Snap off and stencil separation speed are also important for good printing quality. Snap off is the distance between the stencil and the PCB. For metal stencil printing, the snap off should be zero. This is also called contact printing. A high snap off will result in a thicker layer of solder paste. Stencil separation speed is the speed of separation between the stencil and PCB after printing. Traditionally, high separation speed will result in clogging of the stencil apertures or tailing at edges around the solder paste deposited (Figure 1.1). However, lead‐free pastes tend to have a higher adherence than tin‐lead pastes and may prefer high separation speed than tin‐lead solder paste. Separation speed varies depending on the solder pastes and its supplier, and the supplier's recommendation should generally be followed.
Figure 1.1 Example of tailing at the edge of the paste due to high separation speed.
Last but not least, the correct solder paste type and material should be used. The correct type of solder paste should be selected based upon the size of the apertures within the stencil. Type 3 was commonly used in the tin‐lead process; however, Type 4 has become a more common lead‐free solder paste type in the recent years due to the increase in miniaturized components on the printed circuit board. The release from the apertures of the stencil is affected by the particle size within the selected solder paste. Table 1.1 lists the particle size of different solder paste type.
Table 1.1 General solder paste type and particle sizes.
Paste type
Particle size (μm)
3
45–25
4
38–20
5
25–15
6
15–5
Both tin‐lead and lead‐free solder paste should be refrigerated while being stored to maintain its shelf life but must be brought to room temperature before use to maintain quality. Some new lead‐free solder pastes require no refrigeration and can be stored at room temperature. The solder paste should be mixed properly before use to ensure even distribution of any separated material throughout the paste. It is recommended to follow the solder paste manufacturer's recommendations for storage and handling conditions.
1.4 Component Placement
1.4.1 Introduction
After the correct amount of solder paste is applied, components are placed on the PCB at the specific locations. The component placement process includes board loading and registration, fiducial vision alignment, component pick‐up, component inspection, and alignment and placement. The component placement must be precise and in accordance with the schematics. Pick and place machines are used in this process. There are different types of pick and placement machine available in the market. Some machines are designed specifically for speed whereas others are more focused on flexibility. The machines designed for speed are generally referred to as “chip shooters” and can achieve component placement rates of up to 100 000 cph (components per hour). The flexible pick and place machine can handle components ranging from 01005 (Imperial) chips to large components such as ball grid arrays (BGAs), connectors, etc. Flexible machines typically have slower pick and place speed than the chip shooter. The machines are selected depending on the types, sizes, and volumes of the surface mount components. The same pick and place equipment can be used for tin‐lead and lead‐free components.
1.4.2 Key Placement Parameters
Component placement is an important factor in surface mount assembly. It affects not only the assembly time but also the reliability of the solder joint. Placement accuracy and placement speed are critical in this process. To achieve accurate placement and high output, the following factors need to be considered:
Nozzle
Vision system
PCB support
Component size, packaging
Feeder capacity
1.4.2.1 Nozzle
It is very important that the correct nozzle be selected for each different part to be placed to ensure accurate and consistent placement. There are many different types of nozzle for pick and place components. Most nozzles use a vacuum to hold the components. For handling small components, positive pressure is often supplied in addition to vacuum at the moment of placement so that the component would be completely released from the nozzle. Component flatness at the top surface is important for the pick and place process. Certain components such as connectors that do not have a flat top surface can have a pick‐up pad inserted or pre‐attached by the supplier for pick and place purposes. Some alternative nozzles have a gripper, which grips the component sides instead. The gripper is typically for placing some odd‐shaped components. However, the placement speed is typically slower as compared to the nozzles that hold the component by vacuum. In addition, extra space is required between the components to accommodate the grippers.
1.4.2.2 Vision System
The vision system inspects every component before placement. It checks the part dimensions and any component damage before placement. It is important to program each component with the correct tolerance parameters to allow the machine to determine if an incorrect part has been loaded and also not to reject acceptable components.
1.4.2.3 PCB Support
The PCB needs to have adequate support during component placement. Improper PCB support can cause component misalignment or missing components.
1.4.2.4 Component Size, Packaging, and Feeder Capacity
The surface mount components on the PCB will differ in size. It is common to have small components positioned close to large components in high density design. All small components need to be placed before larger components so that the larger components do not get disturbed and misaligned during placement.
The surface mount components are supplied in different ways. The most common component packages are tape and reel, tubes, and trays.
1.4.2.5 Feeder Capacity
Feeders are used to feed components to a fixed location for the pick‐up mechanism. Feeder types include tape and reel feeder, matrix tray feeder, bulk feeder, and tube feeder. The tape and reel feeders come in different sizes and are the most common feeder for placing large quantities of small components. The number of tape feeders that can be loaded into the machine at a time will play an important role in determining the speed of component placement. The matrix tray feeders are typically used for large and/or expensive components such as BGA or QFN/BTC components. The tray holds the components securely without damaging the body or leads. However, the pick and place process for the tray feeder is often slower than the tape feeder.
1.5 Reflow Process
1.5.1 Introduction
In reflow soldering, the solder paste and solder balls for the case of a BGA component must be heated sufficiently above its melting point and become completely molten, in order to form reliable joints. In the case of components with leads, the solder paste must wet the plating on component leads to form the desired heel and toe fillets.
There is no one best reflow profile for all board assemblies. Ideally, a reflow profile must be characterized for each board assembly using thermocouples at multiple locations on and around the component devices and board. The solder paste type, component, and board thermal sensitivity must be considered in reflow profile development.
Lead‐free solders typically process at higher temperature than tin‐lead solder due to the high melting temperature of typical lead‐free solders. Lead‐free solder such as SAC305 (Sn3Ag0.5Cu) have an initial melting point of 217 °C and a final melting point of 220 °C. Lead‐free reflow typically has a narrower process window than tin‐lead reflow due to the component or board maximum temperature limitations.
1.5.2 Key Parameters
Solder joint formation depends on temperature and time during reflow. There are four phases of a reflow process, including preheat, soak, reflow, and cooling. In addition, reflow atmosphere plays an important role in the reflow process. The key parameters for reflow will be discussed in the following sections.
1.5.2.1 Preheat
The preheat phase prepares the PCB and components for actual reflow. It helps to reduce the thermal shock and temperature difference between the PCB and components and reflow temperature. A quick ramp rate during the preheat can damage the component. In general, a ramp rate between 1.0 and 3.0 °C/s−1 is recommended, and the temperature change should be evenly distributed throughout the PCB. Preheat also removes some flux volatiles and prepares the solder paste material for reflow.
1.5.2.2 Soak
Soak is also known as the pre‐reflow phase. In this phase, the flux in the solder paste gets activated, and this helps to remove oxidation on the component leads, PCB pads or on the solder particles' surface. Also, soaking phase allows the thermal gradient across the PCB to equilibrate prior to reflow. In this way, the entire assembly sees nearly the same reflow conditions to form consistent solder bonds. For large boards or boards with a large range of component sizes, a longer soak time is usually helpful to achieve successful assembly to help ensure the delta Temperature across the board is reduced. Soak profiles are also used to minimize voiding when assembling such components as BGA, land grid array (LGA), and QFN/BTC.
1.5.2.3 Reflow
As the solder reaches the solder melting temperature, the board enters the reflow phase. Peak temperature and time above liquidus temperature are important factors in this phase. The peak temperature is generally 20–30 °C above the liquidus temperature of the alloy, and reflow time is typically 30–90 seconds in order to form a good solder joint and proper intermetallic formation at the interfaces.
A typical reflow profile chart is shown in Figure 1.2, and typical profile parameters are listed in Table 1.2.
Figure 1.2 Reflow profile chart [3]. Copyright 2019 by IPC International, Inc. and is used with IPC's permission. This image may not be altered or further reproduced without the prior written consent of IPC.
Table 1.2 Typical lead‐free profile parameters for lead‐free.
Parameters
Typical lead‐free profile
Preheat ramp rate
1–3 °C s
−1
Preheat and soak temperature range
110–210 °C
Preheat and soak time
60–180 s
Reflow time
30–90 s
Peak temperature
235–255 °C (for alloy liquidus temperature of ∼217 °C)
Cooling rate
∼3–4 °C s
−1
1.5.2.4 Cooling
Cooling affects the grain structure of the solder joint. Fast cooling rate results in fine grain structure which is assumed to have a more reliable solder joint and bond. However, too fast a cooling rate can exert thermal stress on the solder joint, which can result in fractures or tears on the solder joint. In general, cooling rate should not exceed 3–4 °C s−1.
1.5.2.5 Reflow Atmosphere
Lead‐free reflow can be done in both air and nitrogen environment. Reflow soldering in an inert atmosphere such as nitrogen reduces the solder oxidation during reflow and results in better wetting and appearance of the solder joint. However, nitrogen adds additional cost to the reflow process. Today, most lead‐free reflow in manufacturing can be done in an air environment. For fine pitch components and some advanced assembly such as flip chip assembly and package on package (PoP) components, a nitrogen atmosphere is recommended
