101,99 €
Understand and apply the tools of computer-aided design to analog signal processing
Signal processing is done mostly with digital circuits, but because the signals generated by our environment are themselves analog, some incorporation of analog circuitry is unavoidable. The design and construction of analog circuits is difficult and time-consuming out of all proportion to the number and prominence of these circuits in signal processing systems. In recent years, groundbreaking computer-aided tools have emerged to facilitate and hasten the design of these circuits.
Methods and Tools for Computer-aided Design of Multidimensional Filters in Signal Processing offers an introduction to these tools and their applications. It will focus particularly on VHDL, the most popular language used to describe hardware, and an essential tool in presenting circuits which are too complex to present graphically. Offering a design method based in C++ and a variety of techniques for fabricating integrated circuits, this is a must-own volume for researchers and engineers working on signal processing methods.
Methods and Tools for Computer-aided Design of Multidimensional Filters in Signal Processing readers will also find:
Methods and Tools for Computer-aided Design of Multidimensional Filters in Signal Processing is ideal for researchers working on signal processing, as well as engineers, programmers, and other experts developing computer tools for filter design.
Sie lesen das E-Book in den Legimi-Apps auf:
Seitenzahl: 149
Veröffentlichungsjahr: 2024
Cover
Table of Contents
Title Page
Copyright
Dedication
About the Author
Foreword
Preface
Acknowledgments
Acronyms
Introduction
1 Filter Design Based on Lossless Prototype Circuits
1.1 Design Example of a Simple gC Circuit
1.2 Higher Order Filters
1.3 Filter Pair Design
1.4 Low-Sensitivity Filter Design Strategy
2 Basics of Computer Tools
2.1 Basic Operations in Linux and in Matlab or Octave Environments
2.2 Calculation of Structural Numbers with the Use of Class SNc
2.3 Operations on Multidimensional Polynomials
2.4 Class MDp of Multidimensional Polynomials
3 Integrated Circuit Design
3.1 Design Automation of Integrated Circuit
3.2 Current Mode Integrated Circuit Design
3.3 Square-Law Model of Field Effect Transistors
3.4 Complementary Transistor Pair
3.5 Current Mirror as a Parameterized Cell
3.6 Continuous-Time Current Mode Integrator
3.7 Switched-Current Integrator
3.8 Differential Stage
3.9 Differential Transconductance Amplifier
4 Hardware Implementation of Mixed Signal Systems
4.1 Filter Design in OTA-C Technique
4.2 Design of Filter Banks
4.3 General Structure of FI ADC
4.4 Analysis Filter Bank Design
4.5 Analysis Filter Bank Implementation in SI Technique
4.6 Synthesis Filter Bank Design
5 Digital Implementation of Multidimensional Networks
5.1 Basics of Compression Standards
5.2 Three-Dimensional IIR Filters for Videos
5.3 Hardware Implementation of 3D Filters
5.4 3D Filters in Video Coding
Bibliography
Index
End User License Agreement
Chapter 5
Table 5.1 Zig-zag scan order.
Table 5.2 Arithmetic encoding of the word .
Table 5.3 Example of arithmetic decoding.
Table 5.4 Results of synthesis of 1 and 20 filters on XC7A200T.
Chapter 1
Figure 1.1 Symbol of ideal gyrator with currents and voltages represented on...
Figure 1.2 Ladder structure of elliptic LC filter and its gC counterpart cir...
Figure 1.3 Frequency characteristics of 7th order elliptic filter calculated...
Figure 1.4 Frequency characteristics of a fifth-order filter pair for the lo...
Figure 1.5 Lossless two-port network loaded by resistors.
Figure 1.6 Transducer factor and voltage ratio as functions of a lossless ci...
Chapter 3
Figure 3.1 Complementary pair of n-channel and p-channel transistors.
Figure 3.2 Current mirror.
Figure 3.3 Complementary current mirror cell.
Figure 3.4 Continuous-time current mode integrator.
Figure 3.5 Balanced structure of the bilinear integrator.
Figure 3.6 Second generation memory cells: basic memory cell (a), cell (b)...
Figure 3.7 Circuit based on a second-generation memory cell.
Figure 3.8 Differential stage.
Figure 3.9 Currents in a differential stage.
Figure 3.10 Differential transconductance amplifier.
Figure 3.11 Fully differential transconductance amplifier.
Figure 3.12 Symbol of the fully differential transconductance amplifier.
Figure 3.13 Mixer cell.
Chapter 4
Figure 4.1 Amplitude (a) and phase (b) responses of the filter described by ...
Figure 4.2 OTA-C implementation (b) of the gyrator–capacitor circuit (a) des...
Figure 4.3 Implementations (b) and (c) of ideal gyrator (a) with the use of ...
Figure 4.4 Implementation of conductances based on transconductance amplifie...
Figure 4.5 Structure of an M-channel FI ADC composed of multiport analysis a...
Figure 4.6 Frequency characteristics of the three-output analysis filter ban...
Figure 4.7 Window of CMmaker after the actions: loading of technology file, ...
Figure 4.8 A block diagram of the analysis filter bank implemented in the SI...
Figure 4.9 Perfect reconstruction achieved with the use of the designed synt...
Figure 4.10 Digital implementation of the three-input, one-output synthesis ...
Figure 4.11 Root locations of the stable IIR synthesis filter.
Chapter 5
Figure 5.1 Pixel block covered by red, green, and blue (RGB) filters, follow...
Figure 5.2 AV1 block partition for prediction and transformation. The block ...
Figure 5.3 Block partitioning structure as a tree.
Figure 5.4 Block partition into subblocks for prediction (solid line) and fo...
Figure 5.5 Image compression with the use of DCT. The original frame is on t...
Figure 5.6 4th (first column) and 12th (second column) frames of two artific...
Figure 5.7 Scheme diagram of IIR 3D filter synthesis.
Figure 5.8 Original frames, from 8th to 15th, of coastguard.avi video.
Figure 5.9 Frames from 8th to 15th of coastguard.avi video, filtered with th...
Figure 5.10 Frames from 8th to 15th of coastguard.avi video, filtered with t...
Figure 5.11 Symbol of the filter, implemented on the FPGA, for video process...
Figure 5.12 The architecture of the digital circuit implementing parallel im...
Figure 5.13 Timeline of tasks performed by individual cores in the FPGA.
Figure 5.14 Scheme diagram of IIR 3D filtering.
Figure 5.15 Frame numbers 2, 8, and 14 of the gbicycle.avi video in ideal (a...
Figure 5.16 Patches of the 14th frame (last column in Fig. 5.15) of the gbic...
Cover
Table of Contents
Series Page
Title Page
Copyright
Dedication
About the Author
Foreword
Preface
Acknowledgments
Acronyms
Introduction
Begin Reading
Bibliography
Index
End User License Agreement
ii
iii
iv
v
ix
x
xi
xiii
xv
xvii
xviii
xix
xx
xxi
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
IEEE Press445 Hoes LanePiscataway, NJ 08854
IEEE Press Editorial BoardSarah Spurgeon, Editor-in-Chief
Moeness Amin
Jón Atli Benediktsson
Adam Drobot
James Duncan
Ekram Hossain
Brian Johnson
Hai Li
James Lyke
Joydeep Mitra
Desineni Subbaram Naidu
Tony Q. S. Quek
Behzad Razavi
Thomas Robertazzi
Diomidis Spinellis
Andrzej Handkiewicz
Jacob of Paradise Academy
Gorzow Wlkp., Poland
Copyright © 2025 by The Institute of Electrical and Electronics Engineers, Inc.All rights reserved.
Published by John Wiley & Sons, Inc., Hoboken, New Jersey.Published simultaneously in Canada.
No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning, or otherwise, except as permitted under Section 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, Inc., 222 Rosewood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 750-4470, or on the web at www.copyright.com. Requests to the Publisher for permission should be addressed to the Permissions Department, John Wiley & Sons, Inc., 111 River Street, Hoboken, NJ 07030, (201) 748-6011, fax (201) 748-6008, or online at http://www.wiley.com/go/permission.
Trademarks: Wiley and the Wiley logo are trademarks or registered trademarks of John Wiley & Sons, Inc. and/or its affiliates in the United States and other countries and may not be used without written permission. All other trademarks are the property of their respective owners. John Wiley & Sons, Inc. is not associated with any product or vendor mentioned in this book.
Limit of Liability/Disclaimer of Warranty: While the publisher and author have used their best efforts in preparing this book, they make no representations or warranties with respect to the accuracy or completeness of the contents of this book and specifically disclaim any implied warranties of merchantability or fitness for a particular purpose. No warranty may be created or extended by sales representatives or written sales materials. The advice and strategies contained herein may not be suitable for your situation. You should consult with a professional where appropriate. Further, readers should be aware that websites listed in this work may have changed or disappeared between when this work was written and when it is read. Neither the publisher nor authors shall be liable for any loss of profit or any other commercial damages, including but not limited to special, incidental, consequential, or other damages.
For general information on our other products and services or for technical support, please contact our Customer Care Department within the United States at (800) 762-2974, outside the United States at (317) 572-3993 or fax (317) 572-4002.
Wiley also publishes its books in a variety of electronic formats. Some content that appears in print may not be available in electronic formats. For more information about Wiley products, visit our web site at www.wiley.com.
Library of Congress Cataloging-in-Publication Data applied for:Hardback ISBN: 9781394263622
Cover Design: WileyCover Image: © YAY Media AS/Alamy Stock Photo
To my grandchildren:Jadwiga, Jan, Tymoteusz, Weronika,Tytus, Karol, Leon, Jȩdrzej,“…don’t be afraid, sail out into the deep…” (JPII).
Andrzej Handkiewicz is a professor at the Jacob of Paradise Academy in Gorzow Wlkp., Poland. After one year of research, he left the Swiss Federal Institute of Technology in Zurich in the early 1990s and returned to the Poznań University of Technology to become vice dean of the Faculty of Electrical Engineering, a position he held in the years 1993–1999. Since 2005, he has been the vice dean of the Faculty of Computing for eight years. He is a member of many Polish and international scientific societies (two sections of the Electronics and Telecommunications Committee of the Polish Academy of Sciences and three IEEE societies). He is the author of Mixed-Signal Systems: A Guide to CMOS Circuits Design, published by Wiley-IEEE in 2002. He has also published over 100 technical papers in the areas of mixed-signal circuits, switched capacitor and switched current filters, and digital filters for image compression and processing.
There are many excellent monographs devoted to signal processing, in which this issue is discussed at various levels of advancement. These include both textbooks that have been used by entire generations of students and items based on the most complex mathematical apparatus. In terms of the above-mentioned features, the new book proposed to readers does not try to compete with the existing rich literature. Therefore, I tried not to duplicate content that already appears in the existing literature. I focused on three aspects that, in my opinion, may be of interest to the reader. The first one is the use of gyrator-capacitor prototype circuits (gC) to design filters. This design trend has existed since the dawn of filter theory but is based on reactance networks, in particular those with a ladder structure. The monograph shows that the use of gC circuits as prototype circuits creates new perspectives in the design of multiport filters and especially multidimensional ones. The second trend in the monograph concerns computer-aided design tools, which were developed with my participation and are open access, and their description in the monograph not only facilitates their use but also enables their creative development. The third aspect, rather rarely discussed in books related to signal processing, concerns the hardware implementation of the designed filters. This is not only about digital implementation but also about the use of techniques such as OTA-Cs and switched-currents (SI). In my opinion, these are prospective techniques related to the development of field effect transistors (FET) in 2 nm technology.
It would be difficult to point to an area in which signal processing does not play a significant role. Because it involves the processing and transmission of information, it is important not only in technical disciplines but also generally with all activities demonstrated by people organized in specific social groups. An image, or a video signal, plays a special role in human perception. Cave paintings from several dozen thousand years ago indicate the huge role of this type of signals in the way of understanding and explaining the reality surrounding humans. The influence of pictorial perception of reality on our consciousness is especially visible nowadays thanks to smartphones and other handheld devices that we currently have. Algorithms and techniques for processing video signals play a special role in the development of these devices.
The development of video compression standards is closely related to hardware feasibility. The continuous growth of memory sizes and processor speeds and other hardware such as field programmable gate arrays (FPGAs) enables the implementation of algorithms of increasing computational complexity. Open access to compression standards plays an important role in the development of compression methods. An example is the AV1 standard developed by the Alliance for Open Media consortium. The AV1 codec is characterized by a balance between compression performance and the current level of development of integrated circuit technology. The technological aspect is strongly emphasized in the presented monograph. The digital sphere dominates signal processing. Digital circuit designers have a wide selection of computer-aided design tools here. The bottleneck is the design of analog circuits, the use of which is necessary at the border between the world of discrete and continuous time signals. The book discusses two techniques for implementing prototype gC circuits and associated design tools. These are OTA-C and switched-current (SI) techniques, which seem to be particularly useful from the point of view of currently developed field effect transistors (FET) in the nanometer scale.
July, 2014Gorzow Wlkp., Poland
There are many people to whom I owe gratitude and thanks. These include all those who introduced me to the secrets of circuit theory and signal processing. It is impossible to list them all. I will stop at three professors who are also known to a wider audience. The first of them is Prof. Stanisław Bellert, with whom I was able to cooperate for many years as a doctoral student in Warsaw. He was a role model for me not only because of his extensive knowledge but also as a man with great personal culture. The next one is Prof. George Moschytz, with whom I was able to expand my knowledge and skills while staying in Zurich for several months. Being aware that this list is very limited, I would also like to mention Prof. Alfred Fettweis, whom I could visit in Bochum and whose scientific works were an inspiration for my scientific activity.
I also owe a lot to my family, who have supported me throughout my professional career, in performing both everyday teaching and scientific duties. I am especially grateful to my wife, Hanna, for the patience and understanding she showed me.
I am also grateful to many of my younger colleagues. Cooperation with them has always been an opportunity to expand my scientific horizons. Special thanks are due to those with whom I cooperated as a supervisor of their doctorates. The effects of this cooperation are largely presented in this monograph. These are Paweł Śniatała, Marcin Łukowiak, Radosław Rudnicki, Marek Kropidłowski, Piotr Katarzyński, Szymon Szczȩsny, and Mariusz Naumowicz. Two of them are professors at the Poznań University of Technology, and one is a professor at the Rochester Institute of Technology. The others also have significant achievements not only in scientific activities but also in management and industry. Their achievements make me proud.
I would also like to thank the reviewers whose comments brought the content of the monograph closer to the readers’ expectations. My sincere thanks go to the entire Wiley team, with whom I had the opportunity to improve editorially the book.
Andrzej Handkiewicz
ADC
analog-to-digital converter
ADST
asymmetrical discrete sine transform
BIBO
bounded input/bounded output stability
CKL
current Kirchhoff’s law
CMRR
common mode rejection ratio
DCT
discrete Cosine transform
Fourier transform
Laplace transform
FET
field effect transistor
FI
frequency-interleaved converter
FIR
finite impulse response
FPGA
field programmable gate array
gC
gyrator-capacitor circuit
drain current
IIR
infinite impulse response
KLT
Karhunen–Loeve transformation
LO
local oscillator
LUT
lock up table
MDp
class of MultiDimensional polynomials
MV
motion vector
NS
nano-sheet
OTA-C
operational transconductance amplifier, capacitor circuit
RAM
random access memory
RF
radio frequency
RGB
red, green, blue color space
RLC
resistance, inductance, capacitance circuit
sensitivity of transfer function magnitude
scattering matrix
SNc
structural number class
SC
switched-capacitor
SI
switched-current
drain-source voltage
gate-source voltage
VHDLA
very (high speed) hardware description language – analog (and mixed-signal)
threshold voltage
transform