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- Herausgeber: Wiley-VCH GmbH
- Kategorie: Fachliteratur
- Sprache: Englisch
Graphene for Post-Moore Silicon Optoelectronics
Provides timely coverage of an important research area that is highly relevant to advanced detection and control technology
Projecting device performance beyond the scaling limits of Moore’s law requires technologies based on novel materials and device architecture. Due to its excellent electronic, thermal, and optical properties, graphene has emerged as a scalable, low-cost material with enormous integration possibilities for numerous optoelectronic applications. Graphene for Post-Moore Silicon Optoelectronics presents an up-to-date overview of the fundamentals, applications, challenges, and opportunities of integrating graphene and other 2D materials with silicon (Si) technologies.
With an emphasis on graphene-silicon (Gr/Si) integrated devices in optoelectronics, this valuable resource also addresses emerging applications such as optoelectronic synaptic devices, optical modulators, and infrared image sensors. The book opens with an introduction to graphene for silicon optoelectronics, followed by chapters describing the growth, transfer, and physics of graphene/silicon junctions. Subsequent chapters each focus on a particular Gr/Si application, including high-performance photodetectors, solar energy harvesting devices, and hybrid waveguide devices. The book concludes by offering perspectives on the future challenges and prospects of Gr/Si optoelectronics, including the emergence of wafer-scale systems and neuromorphic optoelectronics.
- Illustrates the benefits of graphene-based electronics and hybrid device architectures that incorporate existing Si technology
- Covers all essential aspects of Gr/Si devices, including material synthesis, device fabrication, system integration, and related physics
- Summarizes current progress and future challenges of wafer-scale 2D-Si integrated optoelectronic devices
- Explores a wide range of Gr/Si devices, such as synaptic phototransistors, hybrid waveguide modulators, and graphene thermopile image sensors
Graphene for Post-Moore Silicon Optoelectronics is essential reading for materials scientists, electronics engineers, and chemists in both academia and industry working with the next generation of Gr/Si devices.
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Seitenzahl: 336
Veröffentlichungsjahr: 2023
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Table of Contents
Cover
Title Page
Copyright
Preface
Acknowledgments
Biography
1 Graphene for Silicon Optoelectronics
1.1 Introduction
1.2 Optical Absorption
1.3 Emergence of Graphene in Silicon Optoelectronics
1.4 Photodetection in Graphene
1.5 Outlook
References
2 Growth and Transfer of Graphene for Silicon Optoelectronics
2.1 Introduction
2.2 Growth of Graphene
2.3 Dielectric Deposition on Graphene
2.4 Graphene Transfer Methods
2.5 Fabrication of Solution‐processed Graphene and Integration with Silicon
2.6 Graphene Transfer on Flexible Silicon
2.7 Graphene Integration with Silicon in CMOS Process
2.8 Challenges and Future Prospectives
References
3 Physics of Graphene/Silicon Junctions
3.1 Introduction
3.2 Physics of Schottky Junction
3.3 Measurement of Schottky Barrier Height
3.4 2D Materials and Schottky Junctions
3.5 Challenges and Future Prospective
References
4 Graphene/Silicon Junction for High‐performance Photodetectors
4.1 Introduction
4.2 Ultraviolet Photodetectors
4.3 Visible to Near‐infrared Photodetector
4.4 Broadband Photodetectors
4.5 Hybrid Gr/Si Photodetectors
4.6 Challenges and Perspectives
References
5 Graphene/Silicon Solar Energy Harvesting Devices
5.1 Introduction
5.2 Photovoltaic Mechanism and Performance Parameters of Graphene/Silicon Solar Cells
5.3 Theoretical Efficiency Limits of Graphene Silicon Solar Cells
5.4 Optimization of Graphene/Silicon Solar Cells
5.5 Challenges and Perspectives
References
6 Graphene Silicon‐integrated Waveguide Devices
6.1 Introduction
6.2 Hybrid Waveguide Photodetector
6.3 Hybrid Waveguide Modulator
6.4 Challenges and Prospectives
References
7 Graphene for Silicon Image Sensor
7.1 Introduction
7.2 Quantum Dot‐based Infrared Graphene Image Sensor
7.3 Graphene Thermopile Image Sensor
7.4 Graphene THz Image Sensor
7.5 Curved Image Sensor Array
7.6 Neural Network Image Sensors
7.7 Graphene Charge‐coupled Device Image Sensor
7.8 Graphene‐based Position‐sensitive Detector
7.9 Challenges and Perspectives
References
8 System Integration with Graphene for Silicon Optoelectronics
8.1 Introduction
8.2 Graphene Silicon Flip Chips
8.3 Graphene Silicon Heterogeneous Integration
8.4 Graphene Silicon Monolithic Integration for Optoelectronics Applications
8.5 Challenges and Prospective
References
9 Graphene for Silicon Optoelectronic Synaptic Devices
9.1 Introduction
9.2 Silicon Neurons
9.3 Synaptic Devices
9.4 Silicon Optoelectronic Synaptic Devices
9.5 ORAM Synaptic Devices
9.6 Graphene for Silicon Synaptic Devices
9.7 Synaptic Phototransistor
9.8 Broadband, Low‐power Optoelectronic Synaptic Devices
9.9 Challenges and Prospects
References
10 Challenges and Prospects of Graphene–Silicon Optoelectronics
10.1 Emergence of Wafer‐scale Systems
10.2 Wafer‐scale Synthesis and Foundry Process
10.3 Scalable Transfer and Quality Metrics
10.4 Scaling Laws and Hot‐electron Effects
10.5 Optical Modulators
10.6 Infrared Photodetectors
10.7 Neuromorphic Optoelectronics
References
Index
End User License Agreement
List of Tables
Chapter 1
Table 1.1 Comparison of properties of 2D and bulk materials.
Chapter 7
Table 7.1 Performance parameters of Si‐based PSDs.
List of Illustrations
Chapter 1
Figure 1.1 Application of two‐dimensional materials‐silicon technology depic...
Figure 1.2 (a) Optical transitions in graphene. (b) Optical conductivity ver...
Figure 1.3 (a) Schematic drawing of the one‐dimensional edge and two‐dimensi...
Figure 1.4 Ultrafast photocarrier dynamics in graphene. (a) Photoexcitation ...
Figure 1.5 Photothermionic effect in graphene‐based device. (a) Schematic of...
Figure 1.6 Deep‐depletion GOS device and operating principle. (a) Schematic ...
Figure 1.7 (a) Schematic of a graphene‐quantum dot hybrid phototransistor. (...
Figure 1.8 (a) 3D sketch of graphene‐integrated Si waveguide optical modulat...
Chapter 2
Figure 2.1 Electronic configuration of C‐atom and three‐phase hybridization ...
Figure 2.2 Schematic for the industrial‐level production of (a) Gr flakes an...
Figure 2.3 Growth mechanism of Gr film on Cu substrate in the CVD system. (a...
Figure 2.4 (a) Dependence of Gr nucleation on the concentration of active C‐...
Figure 2.5 Schematic diagram of Gr growth on (a) Cu and (b) Ni substrates....
Figure 2.6 Schematic illustrations of (a) the homemade microwave PE‐CVD and ...
Figure 2.7 (a) Schematic diagram of the key steps in the growth of patterned...
Figure 2.8 (a) Direct growth process schematic of the of Gr domains on Si by...
Figure 2.9 (a) AFM of the Gr grown on Ge. (b) Raman spectra of Gr on Ge for ...
Figure 2.10 Mass production of CVD system. (a) Schematic of a typical CVD sy...
Figure 2.11 (a) B2B growth setup with vertical stack (left) and the number o...
Figure 2.12 (a) Schematic structure of HfO
2
thin film on Gr/SiO
2
grown by AL...
Figure 2.13 (a) TEM cross‐sectional image of the Al
2
O
3
/Gr/Al
2
O
3
structure....
Figure 2.14 (a–g) Schematic of the wet transfer method of Gr over arbitrary ...
Figure 2.15 Schematic of the MoO
3
‐assisted transfer process of monolayer Gr ...
Figure 2.16 Illustration of the bubbling transfer process of Gr from a Pt su...
Figure 2.17 Schematic illustration of the polymer‐free transfer process of G...
Figure 2.18 (a, b) Fabrication process of chemical synthesized multilayer Gr...
Figure 2.19 (a–c) Photographs of MAG films integrated with Si. SEM images of...
Figure 2.20 (a) Schematics of PDMS‐assisted transfer printing of thin Si mic...
Chapter 3
Figure 3.1 (a, b) Energy band structure of metal and semiconductor in isolat...
Figure 3.2 (a) Schematic illustrations of steps involved for vdW integration...
Figure 3.3 For transferred metal electrodes, barrier height has a strong cor...
Figure 3.4 (a, b) CV extraction of the SBH for Schottky junctions formed bet...
Figure 3.5 1/
C
2
SK
versus
V
bias
of two different Gr/Si devices
D
1
(black) and...
Figure 3.6 (a) Device schematics. (b) Linear fit of the forward
I
–
V
curve ac...
Figure 3.7 Fermi‐level modulation of Gr in Gr/Si at (a) zero, (b) reverse, a...
Figure 3.8 Dotted red line shows typical metal with no change in the reverse...
Figure 3.9 (a) Schematic (top) and optical micrograph (bottom) of a device. ...
Chapter 4
Figure 4.1 (a) The schematics of a Gr/Si device coated with Al
2
O
3
antireflec...
Figure 4.2 (a) The energy band diagram of the Gr/Si Schottky photodiode. (b)...
Figure 4.3 (a) Schematic of the Si‐quantum dots (QDs)‐integrated Gr/Si photo...
Figure 4.4 (a) Optical absorption of B‐SiQDs at different optical wavelength...
Figure 4.5 (a) Schematic of FGr/Gr photodetector structure. (b) Responsivity...
Figure 4.6 (a) A schematic of the MAG/Si device showing the charge transport...
Figure 4.7 (a) Schematic diagram of Gr/ZnO nanorod arrays/Si photodetector. ...
Figure 4.8 (a) Schematic three‐dimensional diagram of Gr/h‐BN/Si photodetect...
Figure 4.9 (a) Schematic diagram of the HNO
3
‐doped Gr/Si device. (b) The com...
Figure 4.10 (a) Schematic of the Gr/Si heterostructure photodetector in phot...
Chapter 5
Figure 5.1 (a) Schematic of a typical Gr/Si solar cell structure. (b) Energy...
Figure 5.2 Voltage–current characteristics of an ideal and real graphene/Si ...
Figure 5.3 (a) The band diagram of MLG/Si Schottky junction solar cell befor...
Figure 5.4 Cross‐sectional SEM images of tilted (a) 2‐μm...
Figure 5.5 (a, b) SEM view of Si pillar with 2‐μm...
Figure 5.6 (a) Schematics of Gr/planar Si and (b) Gr/SiNW junctions.Arro...
Figure 5.7 (a) Texturing of the Si substrate. (b) Refractive index versus wa...
Figure 5.8 (a) Simulated (dashed lines) and actual (solid lines) reflection ...
Figure 5.9 (a) Schematic illustration of color graphene/Si heterojunction so...
Figure 5.10 (a, b) Effect of h‐BN electron‐blocking layer on energy band dia...
Figure 5.11 Schematic illustrations of the band diagram of the hybrid solar ...
Chapter 6
Figure 6.1 (a) Si Raman lasers. (b) Optically pumped Ge‐on‐Si laser. (c) Hyb...
Figure 6.2 (a) Cross section of the carrier‐depletion‐based Si optical modul...
Figure 6.3 (a) The absorption rate of Gr to vertical incident light is only ...
Figure 6.4 (a) Si waveguide‐integrated Gr photodetector with an asymmetric m...
Figure 6.5 (a) Scanning electron micrograph of the waveguide‐integrated Gr p...
Figure 6.6 (a) Schematic of Gr/Si‐heterostructure waveguide photodetector. D...
Figure 6.7 (a) Schematic configuration of the Si–Gr hybrid plasmonic wavegui...
Figure 6.8 (a) Schematic configuration of the Gr‐based waveguide‐integrated ...
Figure 6.9 (a) Schematic configuration of the Gr/Gr capacitor integrated alo...
Figure 6.10 (a) Schematic configuration of the Gr thermo‐optic modulator bas...
Chapter 7
Figure 7.1 (a) Schematics of Gr/QD photoconductor of a readout circuit. (b) ...
Figure 7.2 (a) Schematic of Gr thermopile fabrication and process flow. (b) ...
Figure 7.3 (a) Schematics of the THz detection configuration in a FET embedd...
Figure 7.4 (a) Schematics of MoS
2
/Gr heterostructure‐based high‐density curv...
Figure 7.5 (a) Schematics of the artificial neural network photodiode array....
Figure 7.6 (a) Schematic of 2D‐CCD pixel. Scale bar 200-...
Figure 7.7 (a) The gate charging current
I
...
Figure 7.8 (a) Schematic of graphene charge injection photodetector. Schemat...
Figure 7.9 (a) Time‐dependent
I
...
Figure 7.10 (a–e) Broadband imaging based on the GCI single pixel and linear...
Figure 7.11 Schematic of the energy band structure of (a) the p–n junction‐b...
Figure 7.12 (a) Schematic diagram of graphene‐based position‐sensitive detec...
Figure 7.13 (a) Schematics of the graphene‐Ge position‐sensitive photodetect...
Figure 7.14 The tasks, goals, and challenges for developing silicon‐2D mater...
Chapter 8
Figure 8.1 Schematic diagram of flip‐chip bonding between Gr array detector ...
Figure 8.2 Schematic diagram for the fabrication and bonding process of flip...
Figure 8.3 (a) Illustration of various 2D planar device structures that can ...
Figure 8.4 Integrated Gr and 2D photodevices. (a) A broadband camera setup b...
Figure 8.5 Fabrication process flow and structure of the Gr–Si hybrid Hall c...
Figure 8.6 Side view explaining the Gr photoconductor and the underlying rea...
Figure 8.7 Schematic diagram for the fabrication of the back end of the line...
Chapter 9
Figure 9.1 Schematics of computing architecture and prototypes. (a) Schemati...
Figure 9.2 Different types of spike‐time‐dependent plasticity (STDP) in neur...
Figure 9.3 Basic configuration of synaptic devices based on planar photocond...
Figure 9.4 Light‐stimulated synaptic Gr/SWNT hybrid phototransistor. (a) Sch...
Figure 9.5 LTP dependent on the gate bias in the artificial synapse. (a) The...
Figure 9.6 Schematic and optical synaptic operations of hybrid b‐doped Si NC...
Figure 9.7 The synaptic weight change
∆
S
stimulated by the spike numbe...
Figure 9.8 (a) Representative
I
–
V
characteristics and schematics of ultrathi...
Chapter 10
Figure 10.1 Some of the potential applications of graphene and related 2D ma...
Figure 10.2 There is a range of mass production methods for graphene with va...
Figure 10.3 Graphene–silicon optical modulators with (a) buried structures h...
Guide
Cover
Table of Contents
Title Page
Copyright
Preface
Acknowledgments
Biography
Begin Reading
Index
WILEY END USER LICENSE AGREEMENT
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Graphene for Post-Moore Silicon Optoelectronics
Yang Xu, Khurram Shehzad, Srikrishna Chanakya Bodepudi, Ali Imran, and Bin Yu
Authors
Prof. Yang Xu
Zhejiang University
School of Micro‐Nano Electronics
No. 388, YuHangTang Rd.
Xihu District
310027 Hangzhou
China
Dr. Khurram Shehzad
Zhejiang University
School of Micro‐Nano Electronics
No. 388, YuHangTang Rd.
Xihu District
310027 Hangzhou
China
Dr. Srikrishna Chanakya Bodepudi
Zhejiang University
School of Micro‐Nano Electronics
No. 388, YuHangTang Rd.
Xihu District
310027 Hangzhou
China
Dr. Ali Imran
Zhejiang University
School of Micro‐Nano Electronics
No. 388, YuHangTang Rd.
Xihu District
310027 Hangzhou
China
Prof. Bin Yu
Zhejiang University
School of Micro‐Nano Electronics
No. 388, YuHangTang Rd.
Xihu District
310027 Hangzhou
China
Cover Images: © GrAl/Shutterstock
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Preface
Miniaturization of electronic devices – a primary step that drives Moore's law –allows the number of digital electronic devices to roughly double by every two years within a fixed cost and area while improving their performance and functionality. However, such progress in power‐efficient, high‐performance, small device footprint, and low‐cost devices has come to a halt as further scaling down leads to difficulty in achieving complex doping profiles and excessive leakage currents. This issue is elevated when devices are scaled down below 3 nm, where bulk semiconductors lose their structural quality and show degrading charge transport and optoelectronic properties. In this context, projecting device performance beyond the scaling limits of Moore's law requires technologies based on novel materials, circuits, and device architecture. Graphene and two‐dimensional (2D) materials have emerged as alternate candidates with atomically thin structures showing excellent charge transport properties and prototypes in computational and noncomputational applications.
Although the domination of Si technology is unlikely to be abandoned in the foreseeable future, the growing benefits of graphene‐based electronics call for hybrid device architectures that incorporate existing remarkable technological evolution and commercial success of Si CMOS technology while adopting the novel features of graphene. “More than Moore” or noncomputational systems, such as photodetectors and modulators for image sensors, light detection and ranging (LiDAR), lasers, biomedical sensors, and neuromorphic and radio‐frequency devices, are swiftly advancing beyond Si electronics when integrated with graphene and other 2D materials by adapting their benefits of low‐power consumption and intrinsic scalability. Fully integrated prototypes of 2D/Si chips, especially graphene, have been realized for diverse applications, including image sensor arrays and optical receivers. Most of these prototypes are developed on the integrated silicon chips where silicon devices provide driver, source, and readout circuitry. This book discusses the basics, applications, challenges, and opportunities regarding integrating graphene with Si technologies, with a special emphasis on graphene–Si (Gr/Si) optoelectronic devices in the post‐Moore era.
It might be helpful to summarize the important aspects of Gr/Si‐integrated devices in optoelectronics in the post‐Moore era. Our book also discusses the progress and future challenges from synthesis to device fabrication and related physics of high‐quality, wafer‐scale Gr/Si‐integrated optoelectronic devices. All these aspects of the Gr/Si devices are relevant to a broad research community in chemistry, materials science, and electronic engineering. This book is arranged to discuss the opportunities and challenges of Gr/Si systems, where each chapter emphasizes selected topics such as high‐performance photodetectors, energy‐harvesting devices, and image sensors and their corresponding progress and challenges. Special emphasis is given to emerging applications like optoelectronic synaptic devices, optical modulators, and infrared image sensors. This book will serve as a good reference for graduate students, postdocs, and scientists from academia and industry.
15 July 2022
Prof. Yang Xu,
On behalf of all the authors,
Zhejiang University, Hangzhou, China
Acknowledgments
We would like to thank Ms. Shaoyu Qian and their publishing team from Wiley for their great support. We also would like to sincerely thank the significant and outstanding contributions from our team members including Dr. Lixiang Liu, Dr. Dajian Liu, Dr. Zhixiang Zhang, Dr. P. Pham, Dr. Jianhang Lv, Dr. Dong Pu, Dr. K. Dianey, M. Ali, Xiaocheng Wang, Xiaoxue Cao, A. Anwar, M. Malik, and Xinyu Liu. Without their great support and remarkable dedication, we could not have finished this book. This book is supported by National Natural Science Foundation of China (NSFC) (Grant Nos. 92164106, 61874094, and 62090034).
Biography
Prof. Yang Xu is a Fellow of the Institute of Physics (FInstP, IOP Fellow), IEEE NTC Distinguished Lecturer, and IEEE Senior Member of the Electron Devices Society. He received his B.S. degree from Department of EE, Institute of Microelectronics, Tsinghua University, M.S. and Ph.D. degrees in ECE from the University of Illinois Urbana‐Champaign (UIUC), USA. He is now a full professor at the School of Micro‐Nano Electronics, Zhejiang University, China. He was also a visiting by‐Fellow of Churchill College at the University of Cambridge, UK, and a visiting professor at the University of California, Los Angeles (UCLA). He has published more than 120 papers in Nature Nanotechnology, Nature Electronics, Nature Photonics, Chemical Reviews, Advanced Materials, Chemical Society Reviews, Nature Communications, Nano Letters, ACS Nano, IEEE‐EDL, IEEE‐TED, IEEE‐TNANO, IEDM, etc. He holds over 30 granted patents and has given more than 50 conference talks. He also served as Associate Editor of IEEE Nanotechnology Magazine, Microelectronics Journal, Micro & Nano Letters, and IET Circuits, Devices & Systems, Advisory Panel Member of IOP Nanotechnology, and was TPC committee members of IEEE‐EDTM, IEEE‐IPFA, and IEEE‐EDAPS conferences. His research interests include emerging 2D/3D integrated optoelectronic devices for Internet‐of‐Things and Post‐Moore Ubiquitous Electronics.
